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From: Jani Nikula <jani.nikula@linux.intel.com>
To: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH v2 2/3] drm/i915/xelpd: Enable Pipe Degamma
Date: Tue, 30 Nov 2021 12:06:09 +0200	[thread overview]
Message-ID: <874k7uj6um.fsf@intel.com> (raw)
In-Reply-To: <YaX2hVZsu/apAFev@intel.com>

On Tue, 30 Nov 2021, Ville Syrjälä <ville.syrjala@linux.intel.com> wrote:
> On Mon, Nov 29, 2021 at 06:19:52PM +0200, Jani Nikula wrote:
>> On Fri, 26 Nov 2021, Uma Shankar <uma.shankar@intel.com> wrote:
>> > Enable Pipe Degamma for XE_LPD. Extend the legacy implementation
>> > to incorparate the extended lut size for XE_LPD.
>> >
>> > v2: Added a helper for degamma lut size (Ville)
>> >
>> > Signed-off-by: Uma Shankar <uma.shankar@intel.com>
>> > ---
>> >  drivers/gpu/drm/i915/display/intel_color.c | 14 +++++++++++---
>> >  1 file changed, 11 insertions(+), 3 deletions(-)
>> >
>> > diff --git a/drivers/gpu/drm/i915/display/intel_color.c b/drivers/gpu/drm/i915/display/intel_color.c
>> > index 42fe549ef6fe..de3ded1e327a 100644
>> > --- a/drivers/gpu/drm/i915/display/intel_color.c
>> > +++ b/drivers/gpu/drm/i915/display/intel_color.c
>> > @@ -808,6 +808,14 @@ static void bdw_load_luts(const struct intel_crtc_state *crtc_state)
>> >  	}
>> >  }
>> >  
>> > +static int glk_degamma_lut_size(struct drm_i915_private *i915)
>> > +{
>> > +	if (DISPLAY_VER(i915) >= 13)
>> > +		return 131;
>> > +	else
>> > +		return 35;
>> > +}
>> > +
>> 
>> Why do we have both a function with hardcoded values and device info
>> members for this?
>
> The device info stuff just needs to get nuked. The size of the LUTs
> depends on the gamma mode which we already select dynamically (and
> if/when we get thre new uapi ironed out it'll become even more
> dynamic), so trying to represent it with a single number in device 
> info is futile.

Works for me, I just like to have the single point of truth instead of
split all over the place. Not against adding this now, but let's not
forget to follow up with the cleanup.

BR,
Jani.


-- 
Jani Nikula, Intel Open Source Graphics Center

  reply	other threads:[~2021-11-30 10:06 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-11-25 20:27 [Intel-gfx] [PATCH v2 0/3] Enable pipe color support on D13 platform Uma Shankar
2021-11-25 20:27 ` [Intel-gfx] [PATCH v2 1/3] drm/i915/xelpd: Enable Pipe color support for " Uma Shankar
2021-11-25 20:27 ` [Intel-gfx] [PATCH v2 2/3] drm/i915/xelpd: Enable Pipe Degamma Uma Shankar
2021-11-29 16:19   ` Jani Nikula
2021-11-30 10:01     ` Ville Syrjälä
2021-11-30 10:06       ` Jani Nikula [this message]
2021-12-07  6:45         ` Shankar, Uma
2021-11-30 10:04   ` Ville Syrjälä
2021-11-25 20:27 ` [Intel-gfx] [PATCH v2 3/3] drm/i915/xelpd: Add Pipe Color Lut caps to platform config Uma Shankar
2021-11-30 10:03   ` Ville Syrjälä
2021-12-07  6:46     ` Shankar, Uma
2021-11-25 21:37 ` [Intel-gfx] ✓ Fi.CI.BAT: success for Enable pipe color support on D13 platform (rev2) Patchwork
2021-11-26  4:51 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork

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