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From: Jani Nikula <jani.nikula@linux.intel.com>
To: "Kahola, Mika" <mika.kahola@intel.com>,
	"Taylor, Clinton A" <clinton.a.taylor@intel.com>,
	"intel-gfx@lists.freedesktop.org"
	<intel-gfx@lists.freedesktop.org>,
	"intel-xe@lists.freedesktop.org" <intel-xe@lists.freedesktop.org>
Subject: RE: [PATCH v2 07/12] drm/i915/cx0: Remove bus reset after every c10 transaction
Date: Thu, 24 Oct 2024 11:20:50 +0300	[thread overview]
Message-ID: <875xphud25.fsf@intel.com> (raw)
In-Reply-To: <MW4PR11MB705444C75DA8CE151657E689EF4E2@MW4PR11MB7054.namprd11.prod.outlook.com>

On Thu, 24 Oct 2024, "Kahola, Mika" <mika.kahola@intel.com> wrote:
>> -----Original Message-----
>> From: Intel-gfx <intel-gfx-bounces@lists.freedesktop.org> On Behalf Of Clint
>> Taylor
>> Sent: Thursday, 24 October 2024 0.47
>> To: intel-gfx@lists.freedesktop.org; intel-xe@lists.freedesktop.org
>> Subject: [PATCH v2 07/12] drm/i915/cx0: Remove bus reset after every c10
>> transaction
>> 
>> C10 phy timeouts occur on xe3lpd if the c10 bus is reset every transaction.
>> Starting with xe3lpd this is bus reset not necessary
>> 
>
> This C10/C20 bus reset was originally placed as a workaround to prevent bus timeouts. These timeouts were fixed elsewhere and therefore these are unnecessary lines.
>
> Reviewed-by: Mika Kahola <mika.kahola@intel.com>

Why no mention of the extra braces in there?

BR,
Jani.

>
>> Signed-off-by: Clint Taylor <clinton.a.taylor@intel.com>
>> ---
>>  drivers/gpu/drm/i915/display/intel_cx0_phy.c | 6 ++++--
>>  1 file changed, 4 insertions(+), 2 deletions(-)
>> 
>> diff --git a/drivers/gpu/drm/i915/display/intel_cx0_phy.c
>> b/drivers/gpu/drm/i915/display/intel_cx0_phy.c
>> index c1357bdb8a3b..a8966a7a9927 100644
>> --- a/drivers/gpu/drm/i915/display/intel_cx0_phy.c
>> +++ b/drivers/gpu/drm/i915/display/intel_cx0_phy.c
>> @@ -224,7 +224,8 @@ static int __intel_cx0_read_once(struct intel_encoder
>> *encoder,
>>  	 * down and let the message bus to end up
>>  	 * in a known state
>>  	 */
>> -	intel_cx0_bus_reset(encoder, lane);
>> +	if ((DISPLAY_VER(i915) >= 30))
>> +		intel_cx0_bus_reset(encoder, lane);
>> 
>>  	return REG_FIELD_GET(XELPDP_PORT_P2M_DATA_MASK, val);  } @@ -
>> 313,7 +314,8 @@ static int __intel_cx0_write_once(struct intel_encoder
>> *encoder,
>>  	 * down and let the message bus to end up
>>  	 * in a known state
>>  	 */
>> -	intel_cx0_bus_reset(encoder, lane);
>> +	if ((DISPLAY_VER(i915) >= 30))
>> +		intel_cx0_bus_reset(encoder, lane);
>> 
>>  	return 0;
>>  }
>> --
>> 2.25.1
>

-- 
Jani Nikula, Intel

  reply	other threads:[~2024-10-24  8:20 UTC|newest]

Thread overview: 32+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-10-23 21:46 [PATCH v2 00/12] drm/i915/xe3lpd: ptl display patches Clint Taylor
2024-10-23 21:46 ` [PATCH v2 01/12] drm/i915/xe3lpd: Update pmdemand programming Clint Taylor
2024-10-23 22:16   ` Gustavo Sousa
2024-10-23 21:46 ` [PATCH v2 02/12] drm/i915/xe3lpd: Disable HDCP Line Rekeying for Xe3 Clint Taylor
2024-10-24 19:04   ` Matt Roper
2024-10-23 21:46 ` [PATCH v2 03/12] drm/i915/xe3lpd: Add check to see if edp over type c is allowed Clint Taylor
2024-10-24  8:19   ` Jani Nikula
2024-10-23 21:46 ` [PATCH v2 04/12] drm/i915/display/ptl: Fill VRR crtc_state timings before other transcoder timings Clint Taylor
2024-10-24 10:52   ` Golani, Mitulkumar Ajitkumar
2024-10-23 21:46 ` [PATCH v2 05/12] drm/i915/ptl: Define IS_PANTHERLAKE macro Clint Taylor
2024-10-23 21:46 ` [PATCH v2 06/12] drm/i915/cx0: Extend C10 check to PTL Clint Taylor
2024-10-23 21:46 ` [PATCH v2 07/12] drm/i915/cx0: Remove bus reset after every c10 transaction Clint Taylor
2024-10-24  6:08   ` Kahola, Mika
2024-10-24  8:20     ` Jani Nikula [this message]
2024-10-24 19:18     ` Matt Roper
2024-10-24 22:15       ` Taylor, Clinton A
2024-10-24 22:21         ` Matt Roper
2024-10-25  6:44           ` Kahola, Mika
2024-10-24  8:20   ` Jani Nikula
2024-10-23 21:46 ` [PATCH v2 08/12] drm/i915/xe3lpd: Move async flip bit to PLANE_SURF register Clint Taylor
2024-10-24  6:14   ` Chauhan, Shekhar
2024-10-23 21:46 ` [PATCH v2 09/12] drm/i915/xe3: Underrun recovery does not exist post Xe2 Clint Taylor
2024-10-24  8:55   ` Pottumuttu, Sai Teja
2024-10-23 21:46 ` [PATCH v2 10/12] drm/i915/display/xe3: disable x-tiled framebuffers Clint Taylor
2024-10-23 22:24   ` Gustavo Sousa
2024-10-23 21:47 ` [PATCH v2 11/12] drm/i915/xe3lpd: Skip disabling VRR during modeset disable Clint Taylor
2024-10-24 17:24   ` Golani, Mitulkumar Ajitkumar
2024-10-23 21:47 ` [PATCH v2 12/12] drm/i915/xe3lpd: Power request asserting/deasserting Clint Taylor
2024-10-23 22:21   ` Gustavo Sousa
2024-10-24  8:49 ` ✓ Fi.CI.BAT: success for drm/i915/xe3lpd: ptl display patches (rev2) Patchwork
2024-10-24  8:50 ` ✗ Fi.CI.SPARSE: warning " Patchwork
2024-10-24 10:38 ` ✗ Fi.CI.IGT: failure " Patchwork

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