From: Jani Nikula <jani.nikula@linux.intel.com>
To: "Srivatsa, Anusha" <anusha.srivatsa@intel.com>,
"Navare, Manasi D" <manasi.d.navare@intel.com>
Cc: "intel-gfx@lists.freedesktop.org" <intel-gfx@lists.freedesktop.org>
Subject: Re: [Intel-gfx] [PATCH 2/6] drm/i915/display: add cdclk action struct to cdclk_config
Date: Tue, 20 Sep 2022 09:55:55 +0300 [thread overview]
Message-ID: <875yhipm9w.fsf@intel.com> (raw)
In-Reply-To: <CY4PR1101MB216689B1D6D7ED654EB51B11F84D9@CY4PR1101MB2166.namprd11.prod.outlook.com>
On Mon, 19 Sep 2022, "Srivatsa, Anusha" <anusha.srivatsa@intel.com> wrote:
>> -----Original Message-----
>> From: Navare, Manasi D <manasi.d.navare@intel.com>
>> Sent: Monday, September 19, 2022 12:33 PM
>> To: Jani Nikula <jani.nikula@linux.intel.com>
>> Cc: Srivatsa, Anusha <anusha.srivatsa@intel.com>; intel-
>> gfx@lists.freedesktop.org
>> Subject: Re: [Intel-gfx] [PATCH 2/6] drm/i915/display: add cdclk action struct
>> to cdclk_config
>>
>> On Mon, Sep 19, 2022 at 12:26:19PM +0300, Jani Nikula wrote:
>> > On Fri, 16 Sep 2022, Anusha Srivatsa <anusha.srivatsa@intel.com> wrote:
>> > > The struct has the action to be performed - squash, crawl or modeset
>> > > and the corresponding cdclk which is the desired cdclk. This is the
>> > > structure that gets populated during atomic check once it is
>> > > determined what the cdclk change looks like
>> > >
>> > > Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
>> > > ---
>> > > drivers/gpu/drm/i915/display/intel_cdclk.h | 14 ++++++++++++++
>> > > 1 file changed, 14 insertions(+)
>> > >
>> > > diff --git a/drivers/gpu/drm/i915/display/intel_cdclk.h
>> > > b/drivers/gpu/drm/i915/display/intel_cdclk.h
>> > > index c674879a84a5..3869f93e8ad2 100644
>> > > --- a/drivers/gpu/drm/i915/display/intel_cdclk.h
>> > > +++ b/drivers/gpu/drm/i915/display/intel_cdclk.h
>> > > @@ -11,13 +11,27 @@
>> > > #include "intel_display.h"
>> > > #include "intel_global_state.h"
>> > >
>> > > +#define MAX_CDCLK_ACTIONS 1
>> >
>> > Okay, this review is just nitpicks, but they'll need to get fixed
>> > eventually so here goes.
>> >
>> > No tab after #define.
>> >
>> > > +
>> > > struct drm_i915_private;
>> > > struct intel_atomic_state;
>> > > struct intel_crtc_state;
>> > >
>> > > +enum cdclk_sequence {
>> >
>> > Needs to be named intel_ something.
>>
>> Agree here
>
> Agree with all the above. Will make the suitable changes.
>
>> >
>> > > + CDCLK_INVALID_ACTION = -1,
>> > > +
>> > > + CDCLK_SQUASH_ONLY = 0,
>> > > + CDCLK_CRAWL_ONLY,
>> > > + CDCLK_LEGACY,
>> > > +};
>> > > +
>> > > struct intel_cdclk_config {
>> > > unsigned int cdclk, vco, ref, bypass;
>> > > u8 voltage_level;
>> > > + struct cdclk_step {
>> >
>> > Needs to be named intel_ something.
>> >
>> > Since this is used independently, I'd prefer it to be defined outside
>> > of struct intel_cdclk_config.
>>
>> I think the point of having it as part of intel_cdclk_config is that because we
>> already pass cdclk_config to set_cdclk where these actions are going to get
>> used.
>
> Yes. That is correct. This eventually gets used in bxt_set_cdclk() and
> we are already passing cdclk_config there. Having this new struct
> embedded in cdclk_config makes the fields - action and cdclk to be
> accessible without having to change the function signature of
> set_cdclk()
I referred to defining the *type* outside of struct intel_cdclk_config.
Contrast
struct foo {
struct bar {
...
} baz;
};
with
struct bar {
...
};
struct foo {
struct bar baz;
};
when you actually use struct bar for parameters and local variables.
BR,
Jani.
>
> Anusha
>> Manasi
>>
>> >
>> > > + enum cdclk_sequence action;
>> > > + u32 cdclk;
>> > > + } steps[MAX_CDCLK_ACTIONS];
>> > > };
>> > >
>> > > struct intel_cdclk_state {
>> >
>> > --
>> > Jani Nikula, Intel Open Source Graphics Center
--
Jani Nikula, Intel Open Source Graphics Center
next prev parent reply other threads:[~2022-09-20 6:56 UTC|newest]
Thread overview: 38+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-09-17 0:43 [Intel-gfx] [PATCH 0/6] Introduce struct cdclk_step Anusha Srivatsa
2022-09-17 0:43 ` [Intel-gfx] [PATCH 1/6] drm/i915/display Add dg2_prog_squash_ctl() helper Anusha Srivatsa
2022-09-17 0:44 ` [Intel-gfx] [PATCH 2/6] drm/i915/display: add cdclk action struct to cdclk_config Anusha Srivatsa
2022-09-19 9:26 ` Jani Nikula
2022-09-19 19:32 ` Navare, Manasi
2022-09-19 22:42 ` Srivatsa, Anusha
2022-09-20 6:55 ` Jani Nikula [this message]
2022-09-17 0:44 ` [Intel-gfx] [PATCH 3/6] drm/i915/display: Embed the new struct steps for squashing Anusha Srivatsa
2022-09-19 9:27 ` Jani Nikula
2022-09-19 19:39 ` Navare, Manasi
2022-09-19 22:54 ` Srivatsa, Anusha
2022-09-17 0:44 ` [Intel-gfx] [PATCH 4/6] drm/i915/display: Embed the new struct steps for crawling Anusha Srivatsa
2022-09-19 9:28 ` Jani Nikula
2022-09-17 0:44 ` [Intel-gfx] [PATCH 5/6] drm/i915/display: Embed the new struct steps for modeset Anusha Srivatsa
2022-09-17 0:44 ` [Intel-gfx] [PATCH 6/6] drm/i915/display: Dump the new cdclk config values Anusha Srivatsa
2022-09-19 19:46 ` Navare, Manasi
2022-09-19 21:10 ` Rodrigo Vivi
2022-09-19 22:35 ` Navare, Manasi
2022-09-20 7:27 ` Jani Nikula
2022-09-20 18:47 ` Srivatsa, Anusha
2022-09-17 1:13 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Introduce struct cdclk_step Patchwork
2022-09-17 1:13 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2022-09-17 1:35 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
2022-09-17 2:08 ` Dixit, Ashutosh
2022-09-19 6:35 ` Vudum, Lakshminarayana
2022-09-19 16:33 ` Dixit, Ashutosh
2022-09-19 4:25 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2022-09-19 5:42 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
2022-09-19 6:25 ` [Intel-gfx] ✓ Fi.CI.IGT: success " Patchwork
2022-09-19 19:48 ` [Intel-gfx] [PATCH 0/6] " Navare, Manasi
2022-09-20 8:20 ` Ville Syrjälä
2022-09-20 18:48 ` Srivatsa, Anusha
2022-09-20 21:59 ` Ville Syrjälä
2022-09-23 16:56 ` Srivatsa, Anusha
2022-09-23 19:04 ` Ville Syrjälä
2022-09-26 17:21 ` Srivatsa, Anusha
2022-09-26 17:29 ` Ville Syrjälä
2022-09-26 17:55 ` Srivatsa, Anusha
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