From: Jani Nikula <jani.nikula@intel.com>
To: Swati Sharma <swati2.sharma@intel.com>, intel-gfx@lists.freedesktop.org
Cc: daniel.vetter@ffwll.ch, ankit.k.nautiyal@intel.com
Subject: Re: [v2][PATCH 1/3] drm/i915/display: Fix formatting issues
Date: Wed, 18 Sep 2019 11:13:27 +0300 [thread overview]
Message-ID: <875zlqxbrs.fsf@intel.com> (raw)
In-Reply-To: <1568724525-19275-2-git-send-email-swati2.sharma@intel.com>
Subject prefix "drm/i915/display" is a fairly broad
statement. "drm/i915/color" perhaps.
Please add a commit message. See git log. We don't approve of empty
commit messages.
On Tue, 17 Sep 2019, Swati Sharma <swati2.sharma@intel.com> wrote:
> Signed-off-by: Swati Sharma <swati2.sharma@intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_color.c | 15 ++++++---------
> 1 file changed, 6 insertions(+), 9 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_color.c b/drivers/gpu/drm/i915/display/intel_color.c
> index 318308d..b1f0f7e 100644
> --- a/drivers/gpu/drm/i915/display/intel_color.c
> +++ b/drivers/gpu/drm/i915/display/intel_color.c
> @@ -807,11 +807,11 @@ static u32 ilk_lut_12p4_ldw(const struct drm_color_lut *color)
> u32 i;
>
> /*
> - * Every entry in the multi-segment LUT is corresponding to a superfine
> - * segment step which is 1/(8 * 128 * 256).
> + * Program Super Fine segment (let's call it seg1)...
> *
> - * Superfine segment has 9 entries, corresponding to values
> - * 0, 1/(8 * 128 * 256), 2/(8 * 128 * 256) .... 8/(8 * 128 * 256).
> + * Super Fine segment's step is 1/(8 * 128 * 256) and it has
> + * 9 entries, corresponding to values 0, 1/(8 * 128 * 256),
> + * 2/(8 * 128 * 256) ... 8/(8 * 128 * 256).
> */
> I915_WRITE(PREC_PAL_MULTI_SEG_INDEX(pipe), PAL_PREC_AUTO_INCREMENT);
>
> @@ -837,10 +837,9 @@ static u32 ilk_lut_12p4_ldw(const struct drm_color_lut *color)
> u32 i;
>
> /*
> - *
> * Program Fine segment (let's call it seg2)...
> *
> - * Fine segment's step is 1/(128 * 256) ie 1/(128 * 256), 2/(128*256)
> + * Fine segment's step is 1/(128 * 256) i.e. 1/(128 * 256), 2/(128*256)
^
Since you're cleaning this up... extra space there. And some of the
items have (128 * 256) and others (128*256).
I wouldn't care otherwise, but why fix some punctuation and leave this
behind.
> * ... 256/(128*256). So in order to program fine segment of LUT we
> * need to pick every 8'th entry in LUT, and program 256 indexes.
> *
> @@ -858,7 +857,7 @@ static u32 ilk_lut_12p4_ldw(const struct drm_color_lut *color)
> * Program Coarse segment (let's call it seg3)...
> *
> * Coarse segment's starts from index 0 and it's step is 1/256 ie 0,
> - * 1/256, 2/256 ...256/256. As per the description of each entry in LUT
> + * 1/256, 2/256 ... 256/256. As per the description of each entry in LUT
> * above, we need to pick every (8 * 128)th entry in LUT, and
> * program 256 of those.
> *
> @@ -890,12 +889,10 @@ static void icl_load_luts(const struct intel_crtc_state *crtc_state)
> case GAMMA_MODE_MODE_8BIT:
> i9xx_load_luts(crtc_state);
> break;
> -
> case GAMMA_MODE_MODE_12BIT_MULTI_SEGMENTED:
> icl_program_gamma_superfine_segment(crtc_state);
> icl_program_gamma_multi_segment(crtc_state);
> break;
> -
> default:
> bdw_load_lut_10(crtc, gamma_lut, PAL_PREC_INDEX_VALUE(0));
> ivb_load_lut_ext_max(crtc);
--
Jani Nikula, Intel Open Source Graphics Center
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next prev parent reply other threads:[~2019-09-18 8:13 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-09-17 12:48 [v2][PATCH 0/3] adding gamma state checker for icl+ platforms Swati Sharma
2019-09-17 12:48 ` [v2][PATCH 1/3] drm/i915/display: Fix formatting issues Swati Sharma
2019-09-18 8:13 ` Jani Nikula [this message]
2019-09-17 12:48 ` [v2][PATCH 2/3] drm/i915/display: Extract icl_read_luts() Swati Sharma
2019-09-18 10:01 ` Jani Nikula
2019-09-18 11:30 ` Sharma, Swati2
2019-09-19 12:31 ` Jani Nikula
2019-09-19 17:30 ` Sharma, Swati2
2019-09-17 12:48 ` [v2][PATCH 3/3] FOR_TESTING_ONLY: Print rgb values of hw and sw blobs Swati Sharma
2019-09-17 15:56 ` ✗ Fi.CI.CHECKPATCH: warning for adding gamma state checker for icl+ platforms (rev2) Patchwork
2019-09-17 16:18 ` ✓ Fi.CI.BAT: success " Patchwork
2019-09-18 4:20 ` ✗ Fi.CI.IGT: failure " Patchwork
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