From: Mika Kuoppala <mika.kuoppala@linux.intel.com>
To: Chris Wilson <chris@chris-wilson.co.uk>, intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH 01/14] drm/i915/execlists: Record preemption for selftests
Date: Wed, 10 Jul 2019 10:40:20 +0300 [thread overview]
Message-ID: <875zoa1gnv.fsf@gaia.fi.intel.com> (raw)
In-Reply-To: <20190710064454.682-1-chris@chris-wilson.co.uk>
Chris Wilson <chris@chris-wilson.co.uk> writes:
> Put back the preemption counters lost in commit 22b7a426bbe1
> ("drm/i915/execlists: Preempt-to-busy") so that our selftests that
> assert no preemption took place continue to function.
>
> v2: But a timeslice is only a "soft" preemption!
>
> Fixes: 22b7a426bbe1 ("drm/i915/execlists: Preempt-to-busy")
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
> Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Reviewed-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
> ---
> drivers/gpu/drm/i915/gt/intel_lrc.c | 7 +++++++
> 1 file changed, 7 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/gt/intel_lrc.c b/drivers/gpu/drm/i915/gt/intel_lrc.c
> index 19ce8eb5e5c9..270ef417dd1a 100644
> --- a/drivers/gpu/drm/i915/gt/intel_lrc.c
> +++ b/drivers/gpu/drm/i915/gt/intel_lrc.c
> @@ -921,6 +921,11 @@ enable_timeslice(struct intel_engine_cs *engine)
> return last && need_timeslice(engine, last);
> }
>
> +static void record_preemption(struct intel_engine_execlists *execlists)
> +{
> + (void)I915_SELFTEST_ONLY(execlists->preempt_hang.count++);
> +}
> +
> static void execlists_dequeue(struct intel_engine_cs *engine)
> {
> struct intel_engine_execlists * const execlists = &engine->execlists;
> @@ -989,6 +994,8 @@ static void execlists_dequeue(struct intel_engine_cs *engine)
> last->fence.seqno,
> last->sched.attr.priority,
> execlists->queue_priority_hint);
> + record_preemption(execlists);
> +
> /*
> * Don't let the RING_HEAD advance past the breadcrumb
> * as we unwind (and until we resubmit) so that we do
> --
> 2.22.0
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prev parent reply other threads:[~2019-07-10 7:40 UTC|newest]
Thread overview: 21+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-07-10 6:44 [PATCH 01/14] drm/i915/execlists: Record preemption for selftests Chris Wilson
2019-07-10 6:44 ` [PATCH 02/14] drm/i915/selftests: Hold the vma manager lock while modifying mmap_offset Chris Wilson
2019-07-10 6:44 ` [PATCH 03/14] drm/i915: Lock the engine while dumping the active request Chris Wilson
2019-07-10 6:44 ` [PATCH 04/14] drm/i915: Rely on spinlock protection for GPU error capture Chris Wilson
2019-07-10 6:44 ` [PATCH 05/14] drm/i915/oa: Reconfigure contexts on the fly Chris Wilson
2019-07-10 6:44 ` [PATCH 06/14] drm/i915: Add to timeline requires the timeline mutex Chris Wilson
2019-07-10 6:44 ` [PATCH 07/14] drm/i915: Teach execbuffer to take the engine wakeref not GT Chris Wilson
2019-07-10 6:44 ` [PATCH 08/14] drm/i915/gt: Track timeline activeness in enter/exit Chris Wilson
2019-07-10 6:44 ` [PATCH 09/14] drm/i915/gt: Convert timeline tracking to spinlock Chris Wilson
2019-07-10 6:44 ` [PATCH 10/14] drm/i915/gt: Guard timeline pinning with its own mutex Chris Wilson
2019-07-10 6:44 ` [PATCH 11/14] drm/i915: Protect request retirement with timeline->mutex Chris Wilson
2019-07-10 6:44 ` [PATCH 12/14] drm/i915: Replace struct_mutex for batch pool serialisation Chris Wilson
2019-07-10 6:44 ` [PATCH 13/14] drm/i915/gt: Mark context->active_count as protected by timeline->mutex Chris Wilson
2019-07-10 6:44 ` [PATCH 14/14] drm/i915/gt: Use intel_gt as the primary object for handling resets Chris Wilson
2019-07-11 20:45 ` Daniele Ceraolo Spurio
2019-07-11 20:49 ` Daniele Ceraolo Spurio
2019-07-12 9:30 ` Chris Wilson
2019-07-10 7:01 ` ✗ Fi.CI.CHECKPATCH: warning for series starting with [01/14] drm/i915/execlists: Record preemption for selftests Patchwork
2019-07-10 7:07 ` ✗ Fi.CI.SPARSE: " Patchwork
2019-07-10 7:20 ` ✗ Fi.CI.BAT: failure " Patchwork
2019-07-10 7:40 ` Mika Kuoppala [this message]
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