From: Jani Nikula <jani.nikula@linux.intel.com>
To: Jonathan Cavitt <jonathan.cavitt@intel.com>,
intel-gfx@lists.freedesktop.org
Cc: janusz.krzysztofik@intel.com, andi.shyti@intel.com,
chris.p.wilson@linux.intel.com, jonathan.cavitt@intel.com,
matthew.d.roper@intel.com, nirmoy.das@intel.com
Subject: Re: [Intel-gfx] [PATCH v4 1/3] drm/i915: Add GuC TLB Invalidation pci tags
Date: Wed, 04 Oct 2023 13:23:32 +0300 [thread overview]
Message-ID: <877co2fzyz.fsf@intel.com> (raw)
In-Reply-To: <20231003210156.1172732-1-jonathan.cavitt@intel.com>
On Tue, 03 Oct 2023, Jonathan Cavitt <jonathan.cavitt@intel.com> wrote:
> Add device info tags for if GuC TLB Invalidation is enabled. Since GuC
> based TLB invalidation is only strictly necessary for MTL presently,
> only enable GuC based TLB invalidations for MTL.
In the subject, what's a "pci tag"?
BR,
Jani.
>
> Signed-off-by: Jonathan Cavitt <jonathan.cavitt@intel.com>
> ---
> drivers/gpu/drm/i915/i915_drv.h | 1 +
> drivers/gpu/drm/i915/i915_pci.c | 1 +
> drivers/gpu/drm/i915/intel_device_info.h | 3 ++-
> 3 files changed, 4 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index b4fa81cab92d7..154f004373a9c 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -821,4 +821,5 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915,
> #define HAS_LMEMBAR_SMEM_STOLEN(i915) (!HAS_LMEM(i915) && \
> GRAPHICS_VER_FULL(i915) >= IP_VER(12, 70))
>
> +#define HAS_GUC_TLB_INVALIDATION(i915) (INTEL_INFO(i915)->has_guc_tlb_invalidation)
> #endif
> diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
> index df7c261410f79..c3a5d5efb45d1 100644
> --- a/drivers/gpu/drm/i915/i915_pci.c
> +++ b/drivers/gpu/drm/i915/i915_pci.c
> @@ -837,6 +837,7 @@ static const struct intel_device_info mtl_info = {
> .memory_regions = REGION_SMEM | REGION_STOLEN_LMEM,
> .platform_engine_mask = BIT(RCS0) | BIT(BCS0) | BIT(CCS0),
> .require_force_probe = 1,
> + .has_guc_tlb_invalidation = 1,
> MTL_CACHELEVEL,
> };
>
> diff --git a/drivers/gpu/drm/i915/intel_device_info.h b/drivers/gpu/drm/i915/intel_device_info.h
> index 39817490b13fd..ad54db0a22470 100644
> --- a/drivers/gpu/drm/i915/intel_device_info.h
> +++ b/drivers/gpu/drm/i915/intel_device_info.h
> @@ -173,7 +173,8 @@ enum intel_ppgtt_type {
> func(has_coherent_ggtt); \
> func(tuning_thread_rr_after_dep); \
> func(unfenced_needs_alignment); \
> - func(hws_needs_physical);
> + func(hws_needs_physical); \
> + func(has_guc_tlb_invalidation);
>
> struct intel_ip_version {
> u8 ver;
--
Jani Nikula, Intel
prev parent reply other threads:[~2023-10-04 10:23 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-10-03 21:01 [Intel-gfx] [PATCH v4 1/3] drm/i915: Add GuC TLB Invalidation pci tags Jonathan Cavitt
2023-10-03 21:01 ` [Intel-gfx] [PATCH v4 2/3] drm/i915: Define and use GuC and CTB TLB invalidation routines Jonathan Cavitt
2023-10-04 14:15 ` Tvrtko Ursulin
2023-10-03 21:01 ` [Intel-gfx] [PATCH v4 3/3] drm/i915: No TLB invalidation on wedged or suspended GT Jonathan Cavitt
2023-10-04 10:19 ` Jani Nikula
2023-10-04 14:29 ` Tvrtko Ursulin
2023-10-03 21:57 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [v4,1/3] drm/i915: Add GuC TLB Invalidation pci tags Patchwork
2023-10-03 21:57 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2023-10-03 22:16 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
2023-10-04 6:23 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [v4,1/3] drm/i915: Add GuC TLB Invalidation pci tags (rev2) Patchwork
2023-10-04 6:23 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2023-10-04 6:38 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
2023-10-04 10:23 ` Jani Nikula [this message]
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=877co2fzyz.fsf@intel.com \
--to=jani.nikula@linux.intel.com \
--cc=andi.shyti@intel.com \
--cc=chris.p.wilson@linux.intel.com \
--cc=intel-gfx@lists.freedesktop.org \
--cc=janusz.krzysztofik@intel.com \
--cc=jonathan.cavitt@intel.com \
--cc=matthew.d.roper@intel.com \
--cc=nirmoy.das@intel.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox