Intel-GFX Archive on lore.kernel.org
 help / color / mirror / Atom feed
From: Jani Nikula <jani.nikula@linux.intel.com>
To: Anusha Srivatsa <anusha.srivatsa@intel.com>,
	intel-gfx@lists.freedesktop.org
Cc: Lucas De Marchi <lucas.demarchi@intel.com>
Subject: Re: [Intel-gfx] [PATCH 2/2] drm/i915/dmc: Add steping info table for remaining platforms
Date: Mon, 05 Jul 2021 13:05:05 +0300	[thread overview]
Message-ID: <877di59ium.fsf@intel.com> (raw)
In-Reply-To: <20210701193114.17531-3-anusha.srivatsa@intel.com>

On Thu, 01 Jul 2021, Anusha Srivatsa <anusha.srivatsa@intel.com> wrote:
> intel_step.c has stepping_info for  most platforms. With DMC using
> display_step from here, lets add the info for all older platforms
> as well

Same here as previous patch. These should be added one platform per
patch, converting the IS_FOO_REVID() macros to
IS_FOO_{GT,DISPLAY}_STEP() and the new stepping info while at it. Look
at the platforms already added. The main point here is being able to
abstract the steppings in intel_step.c so we can use the generic STEP_XY
enums. Having both makes this more complicated.

BR,
Jani.


>
> Cc: Lucas De Marchi <lucas.demarchi@intel.com>
> Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
> ---
>  drivers/gpu/drm/i915/intel_step.c | 28 ++++++++++++++++++++++++++++
>  1 file changed, 28 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/intel_step.c b/drivers/gpu/drm/i915/intel_step.c
> index c8542161c5d0..d8f5ef9ac158 100644
> --- a/drivers/gpu/drm/i915/intel_step.c
> +++ b/drivers/gpu/drm/i915/intel_step.c
> @@ -38,6 +38,13 @@ static const struct intel_step_info skl_revid_step_tbl[] = {
>  	[9] = { .gt_step = STEP_J0, .display_step = STEP_J0 },
>  };
>  
> +static const struct intel_step_info glk_revid_step_tbl[] = {
> +	[0] = { .gt_step = STEP_A0, .display_step = STEP_A0 },
> +	[1] = { .gt_step = STEP_A1, .display_step = STEP_A1 },
> +	[2] = { .gt_step = STEP_A2, .display_step = STEP_A2 },
> +	[3] = { .gt_step = STEP_B0, .display_step = STEP_B0 },
> +};
> +
>  static const struct intel_step_info icl_revid_step_tbl[] = {
>  	[0] = { .gt_step = STEP_A0, .display_step = STEP_A0 },
>  	[3] = { .gt_step = STEP_B0, .display_step = STEP_B0 },
> @@ -71,6 +78,18 @@ static const struct intel_step_info tgl_revid_step_tbl[] = {
>  	[1] = { .gt_step = STEP_B0, .display_step = STEP_D0 },
>  };
>  
> +static const struct intel_step_info dg1_revid_step_tbl[] = {
> +	[0x0] = { .gt_step = STEP_A0, .display_step = STEP_A0 },
> +	[0x1] = { .gt_step = STEP_B0, .display_step = STEP_B0 },
> +};
> +
> +static const struct intel_step_info rkl_revid_step_tbl[] = {
> +	[0x0] = { .gt_step = STEP_A0, .display_step = STEP_A0 },
> +	[0x1] = { .gt_step = STEP_B0, .display_step = STEP_B0 },
> +	[0x4] = { .gt_step = STEP_C0, .display_step = STEP_C0 },
> +
> +};
> +
>  static const struct intel_step_info adls_revid_step_tbl[] = {
>  	[0x0] = { .gt_step = STEP_A0, .display_step = STEP_A0 },
>  	[0x1] = { .gt_step = STEP_A0, .display_step = STEP_A2 },
> @@ -99,6 +118,12 @@ void intel_step_init(struct drm_i915_private *i915)
>  	} else if (IS_ALDERLAKE_S(i915)) {
>  		revids = adls_revid_step_tbl;
>  		size = ARRAY_SIZE(adls_revid_step_tbl);
> +	} else if (IS_ROCKETLAKE(i915)) {
> +		revids = rkl_revid_step_tbl;
> +		size = ARRAY_SIZE(rkl_revid_step_tbl);
> +	} else if (IS_DG1(i915)) {
> +		revids = dg1_revid_step_tbl;
> +		size = ARRAY_SIZE(dg1_revid_step_tbl);
>  	} else if (IS_TGL_U(i915) || IS_TGL_Y(i915)) {
>  		revids = tgl_uy_revid_step_tbl;
>  		size = ARRAY_SIZE(tgl_uy_revid_step_tbl);
> @@ -111,6 +136,9 @@ void intel_step_init(struct drm_i915_private *i915)
>  	} else if (IS_ICELAKE(i915)) {
>  		revids = icl_revid_step_tbl;
>  		size = ARRAY_SIZE(icl_revid_step_tbl);
> +	} else if (IS_GEMINILAKE(i915)) {
> +		revids = glk_revid_step_tbl;
> +		size = ARRAY_SIZE(glk_revid_step_tbl);
>  	} else if (IS_SKYLAKE(i915)) {
>  		revids = skl_revid_step_tbl;
>  		size = ARRAY_SIZE(skl_revid_step_tbl);

-- 
Jani Nikula, Intel Open Source Graphics Center
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

  reply	other threads:[~2021-07-05 10:05 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-07-01 19:31 [Intel-gfx] [PATCH 0/2] Stepping/substepping reorg for DMC Anusha Srivatsa
2021-07-01 19:31 ` [Intel-gfx] [PATCH 1/2] drm/i915/dmc: Use RUNTIME_INFO->step " Anusha Srivatsa
2021-07-02  8:56   ` kernel test robot
2021-07-05 10:01   ` Jani Nikula
2021-07-06 18:33     ` Srivatsa, Anusha
2021-07-01 19:31 ` [Intel-gfx] [PATCH 2/2] drm/i915/dmc: Add steping info table for remaining platforms Anusha Srivatsa
2021-07-05 10:05   ` Jani Nikula [this message]
2021-07-02  0:48 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Stepping/substepping reorg for DMC Patchwork
2021-07-02  0:50 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2021-07-02  1:17 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=877di59ium.fsf@intel.com \
    --to=jani.nikula@linux.intel.com \
    --cc=anusha.srivatsa@intel.com \
    --cc=intel-gfx@lists.freedesktop.org \
    --cc=lucas.demarchi@intel.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox