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From: Jani Nikula <jani.nikula@linux.intel.com>
To: Ville Syrjala <ville.syrjala@linux.intel.com>,
	intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH 5/8] drm/i915/pps: Spell out the eDP spec power sequencing delays a bit more clearly
Date: Thu, 07 Nov 2024 11:19:54 +0200	[thread overview]
Message-ID: <878qtvflj9.fsf@intel.com> (raw)
In-Reply-To: <20241106215859.25446-6-ville.syrjala@linux.intel.com>

On Wed, 06 Nov 2024, Ville Syrjala <ville.syrjala@linux.intel.com> wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> We determine the "spec" eDP power sequencing delays
> by refercing some max values from the eDP spec. Write

*referencing

> out each number from the spec explicitly instead
> of precomputing the final number (that's the job of
> the computer). Makes it a bit easier to see what the
> supposed spec defined numbers actually are.
>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

Reviewed-by: Jani Nikula <jani.nikula@intel.com>

> ---
>  drivers/gpu/drm/i915/display/intel_pps.c | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_pps.c b/drivers/gpu/drm/i915/display/intel_pps.c
> index ed52f84d4cf3..6946ba0004eb 100644
> --- a/drivers/gpu/drm/i915/display/intel_pps.c
> +++ b/drivers/gpu/drm/i915/display/intel_pps.c
> @@ -1512,11 +1512,11 @@ static void pps_init_delays_spec(struct intel_dp *intel_dp,
>  
>  	/* Upper limits from eDP 1.3 spec. Note that we use the clunky units of
>  	 * our hw here, which are all in 100usec. */
> -	spec->power_up = 210 * 10; /* T1+T3 */
> +	spec->power_up = (10 + 200) * 10; /* T1+T3 */
>  	spec->backlight_on = 50 * 10; /* no limit for T8, use T7 instead */
>  	spec->backlight_off = 50 * 10; /* no limit for T9, make it symmetric with T8 */
>  	spec->power_down = 500 * 10; /* T10 */
> -	spec->power_cycle = 510 * 10; /* T11+T12 */
> +	spec->power_cycle = (10 + 500) * 10; /* T11+T12 */
>  
>  	intel_pps_dump_state(intel_dp, "spec", spec);
>  }

-- 
Jani Nikula, Intel

  reply	other threads:[~2024-11-07  9:20 UTC|newest]

Thread overview: 25+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-11-06 21:58 [PATCH 0/8] drm/i915/pps: Some PPS cleanups Ville Syrjala
2024-11-06 21:58 ` [PATCH 1/8] drm/i915/pps: Store the power cycle delay without the +1 Ville Syrjala
2024-11-07  9:18   ` Jani Nikula
2024-11-06 21:58 ` [PATCH 2/8] drm/i915/pps: Decouple pps delays from VBT struct definition Ville Syrjala
2024-11-07  9:18   ` Jani Nikula
2024-11-06 21:58 ` [PATCH 3/8] drm/i915/pps: Rename intel_pps_delay members Ville Syrjala
2024-11-07  9:19   ` Jani Nikula
2024-11-06 21:58 ` [PATCH 4/8] drm/i915/lvds: Use struct intel_pps_delays for LVDS power sequencing Ville Syrjala
2024-11-07  9:19   ` Jani Nikula
2024-11-06 21:58 ` [PATCH 5/8] drm/i915/pps: Spell out the eDP spec power sequencing delays a bit more clearly Ville Syrjala
2024-11-07  9:19   ` Jani Nikula [this message]
2024-11-06 21:58 ` [PATCH 6/8] drm/i915/pps: Extract msecs_to_pps_units() Ville Syrjala
2024-11-07  9:20   ` Jani Nikula
2024-11-06 21:58 ` [PATCH 7/8] drm/i915/pps: Extract pps_units_to_msecs() Ville Syrjala
2024-11-07  9:20   ` Jani Nikula
2024-11-06 21:58 ` [PATCH 8/8] drm/i915/pps: Eliminate pointless get_delay() macro Ville Syrjala
2024-11-07  9:20   ` Jani Nikula
2024-11-06 22:44 ` ✗ Fi.CI.CHECKPATCH: warning for drm/i915/pps: Some PPS cleanups Patchwork
2024-11-06 22:44 ` ✗ Fi.CI.SPARSE: " Patchwork
2024-11-06 23:04 ` ✗ Fi.CI.BAT: failure " Patchwork
2024-11-07  9:22 ` [PATCH 0/8] " Jani Nikula
2024-11-07 16:15 ` ✗ Fi.CI.CHECKPATCH: warning for drm/i915/pps: Some PPS cleanups (rev2) Patchwork
2024-11-07 16:16 ` ✗ Fi.CI.SPARSE: " Patchwork
2024-11-07 16:25 ` ✓ Fi.CI.BAT: success " Patchwork
2024-11-07 19:07 ` ✗ Fi.CI.IGT: failure " Patchwork

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