From: Jani Nikula <jani.nikula@linux.intel.com>
To: Suraj Kandpal <suraj.kandpal@intel.com>, intel-gfx@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH 1/5] drm/i915/dsc: Add PPS enum
Date: Mon, 10 Jul 2023 13:45:59 +0300 [thread overview]
Message-ID: <878rbojb88.fsf@intel.com> (raw)
In-Reply-To: <87bkgkjb9g.fsf@intel.com>
On Mon, 10 Jul 2023, Jani Nikula <jani.nikula@linux.intel.com> wrote:
> On Mon, 10 Jul 2023, Suraj Kandpal <suraj.kandpal@intel.com> wrote:
>> Add PPS enum so that we can later on use it to distinguish which
>> PPS is being read or written onto.
>
> The patch adding the enum alone isn't useful, should be squashed with
> something that uses it.
Also, maybe you could just use an int?
>
> BR,
> Jani.
>
>>
>> Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com>
>> ---
>> drivers/gpu/drm/i915/display/intel_vdsc.c | 17 +++++++++++++++++
>> 1 file changed, 17 insertions(+)
>>
>> diff --git a/drivers/gpu/drm/i915/display/intel_vdsc.c b/drivers/gpu/drm/i915/display/intel_vdsc.c
>> index bd9116d2cd76..1a8272324c36 100644
>> --- a/drivers/gpu/drm/i915/display/intel_vdsc.c
>> +++ b/drivers/gpu/drm/i915/display/intel_vdsc.c
>> @@ -19,6 +19,23 @@
>> #include "intel_vdsc.h"
>> #include "intel_vdsc_regs.h"
>>
>> +enum intel_dsc_pps {
>> + PPS_0 = 0,
>> + PPS_1,
>> + PPS_2,
>> + PPS_3,
>> + PPS_4,
>> + PPS_5,
>> + PPS_6,
>> + PPS_7,
>> + PPS_8,
>> + PPS_9,
>> + PPS_10,
>> + PPS_16,
>> + PPS_17,
>> + PPS_18,
>> +};
>> +
>> bool intel_dsc_source_support(const struct intel_crtc_state *crtc_state)
>> {
>> const struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
--
Jani Nikula, Intel Open Source Graphics Center
next prev parent reply other threads:[~2023-07-10 10:46 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-07-10 10:09 [Intel-gfx] [PATCH 0/5] Add DSC PPS readout Suraj Kandpal
2023-07-10 10:09 ` [Intel-gfx] [PATCH 1/5] drm/i915/dsc: Add PPS enum Suraj Kandpal
2023-07-10 10:45 ` Jani Nikula
2023-07-10 10:45 ` Jani Nikula [this message]
2023-07-11 6:12 ` Kandpal, Suraj
2023-07-10 10:09 ` [Intel-gfx] [PATCH 2/5] drm/i915/vdsc: Add function to read any PPS register Suraj Kandpal
2023-07-10 10:52 ` Jani Nikula
2023-07-10 10:56 ` Jani Nikula
2023-07-10 10:09 ` [Intel-gfx] [PATCH 3/5] drm/i915/vdsc: Add function to write in PPS registers Suraj Kandpal
2023-07-10 10:57 ` Jani Nikula
2023-07-10 10:09 ` [Intel-gfx] [PATCH 4/5] drm/i915/vdsc: Fill the intel_dsc_get_pps_config function Suraj Kandpal
2023-07-10 11:11 ` Jani Nikula
2023-07-11 9:42 ` Kandpal, Suraj
2023-07-10 10:09 ` [Intel-gfx] [PATCH 5/5] drm/i915/display: Compare the readout dsc pps params Suraj Kandpal
2023-07-10 11:15 ` Jani Nikula
2023-07-11 5:15 ` Kandpal, Suraj
2023-07-10 13:45 ` [Intel-gfx] ✗ Fi.CI.BUILD: failure for Add DSC PPS readout Patchwork
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=878rbojb88.fsf@intel.com \
--to=jani.nikula@linux.intel.com \
--cc=intel-gfx@lists.freedesktop.org \
--cc=suraj.kandpal@intel.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox