From: "Dixit, Ashutosh" <ashutosh.dixit@intel.com>
To: "Gupta, Anshuman" <anshuman.gupta@intel.com>
Cc: "linux-hwmon@vger.kernel.org" <linux-hwmon@vger.kernel.org>,
"intel-gfx@lists.freedesktop.org"
<intel-gfx@lists.freedesktop.org>
Subject: Re: [Intel-gfx] [PATCH 2/7] drm/i915/hwmon: Add HWMON current voltage support
Date: Tue, 13 Sep 2022 08:19:15 -0700 [thread overview]
Message-ID: <878rmn5mks.wl-ashutosh.dixit@intel.com> (raw)
In-Reply-To: <CY5PR11MB62114DF624728E35804635D495479@CY5PR11MB6211.namprd11.prod.outlook.com>
On Tue, 13 Sep 2022 01:11:57 -0700, Gupta, Anshuman wrote:
>
Hi Anshuman,
> > -----Original Message-----
> > From: Dixit, Ashutosh <ashutosh.dixit@intel.com>
> > Sent: Monday, September 12, 2022 10:08 PM
> > To: Gupta, Anshuman <anshuman.gupta@intel.com>
> > Cc: Nilawar, Badal <badal.nilawar@intel.com>; intel-gfx@lists.freedesktop.org;
> > Tauro, Riana <riana.tauro@intel.com>; Ewins, Jon <jon.ewins@intel.com>;
> > linux-hwmon@vger.kernel.org
> > Subject: Re: [PATCH 2/7] drm/i915/hwmon: Add HWMON current voltage
> > support
> >
> > On Mon, 12 Sep 2022 07:09:28 -0700, Gupta, Anshuman wrote:
> > >
> > > > +static int
> > > > +hwm_in_read(struct hwm_drvdata *ddat, u32 attr, long *val) {
> > > > + struct i915_hwmon *hwmon = ddat->hwmon;
> > > > + intel_wakeref_t wakeref;
> > > > + u32 reg_value;
> > > > +
> > > > + switch (attr) {
> > > > + case hwmon_in_input:
> > >
> > > Other attributes in this series take hwmon->lock before accessing i915
> > > registers , So do we need lock here as well ?
> >
> > The lock is being taken only for RMW and for making sure energy counter
> > updates happen atomically. We are not taking the lock for just reads so IMO no
> > lock is needed here.
>
> If that is the case, then why it needs to grab a lock for rmw on
> different Register ? Like in patch 3 of this series grabs
> hwmon->howmon_lock for rmw on two different register pkg_power_sku_unit
> and pkg_rapl_limit.
I don't see this happening, where do you see it?
> One register rmw should be independent of other register here ?
Yes each register RMW is independent. In Patch 3 only hwm_power_write (not
hwm_power_read) is taking the lock for RMW on pkg_rapl_limit (lock is not
taken for pkg_power_sku_unit). So the assumption is that RMW of a single
register are not atomic and must be serialized with a lock. Reads are
considered to not need a lock.
Thanks.
--
Ashutosh
> >
> > > > + with_intel_runtime_pm(ddat->uncore->rpm, wakeref)
> > > > + reg_value = intel_uncore_read(ddat->uncore, hwmon-
> > > > >rg.gt_perf_status);
> > > > + /* In units of 2.5 millivolt */
> > > > + *val =
> > > > DIV_ROUND_CLOSEST(REG_FIELD_GET(GEN12_VOLTAGE_MASK, reg_value)
> > * 25,
> > > > 10);
> > > > + return 0;
> > > > + default:
> > > > + return -EOPNOTSUPP;
> > > > + }
> > > > +}
> >
> > Thanks.
> > --
> > Ashutosh
next prev parent reply other threads:[~2022-09-13 15:19 UTC|newest]
Thread overview: 39+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-08-25 13:21 [Intel-gfx] [PATCH 0/7] drm/i915: Add HWMON support Badal Nilawar
2022-08-25 13:21 ` [Intel-gfx] [PATCH 1/7] drm/i915/hwmon: Add HWMON infrastructure Badal Nilawar
2022-08-26 13:30 ` Guenter Roeck
2022-08-29 17:26 ` Dixit, Ashutosh
2022-08-25 13:21 ` [Intel-gfx] [PATCH 2/7] drm/i915/hwmon: Add HWMON current voltage support Badal Nilawar
2022-08-29 17:30 ` Dixit, Ashutosh
2022-09-15 14:40 ` Nilawar, Badal
2022-09-21 0:02 ` Dixit, Ashutosh
2022-09-12 14:09 ` Gupta, Anshuman
2022-09-12 16:37 ` Dixit, Ashutosh
2022-09-13 8:11 ` Gupta, Anshuman
2022-09-13 15:19 ` Dixit, Ashutosh [this message]
2022-09-15 6:29 ` Gupta, Anshuman
2022-08-25 13:21 ` [Intel-gfx] [PATCH 3/7] drm/i915/hwmon: Power PL1 limit and TDP setting Badal Nilawar
2022-08-30 2:33 ` Dixit, Ashutosh
2022-08-25 13:21 ` [Intel-gfx] [PATCH 4/7] drm/i915/hwmon: Show device level energy usage Badal Nilawar
2022-08-30 3:14 ` Dixit, Ashutosh
2022-09-13 8:50 ` Tvrtko Ursulin
2022-09-21 0:24 ` Dixit, Ashutosh
2022-09-21 7:43 ` Tvrtko Ursulin
2022-08-25 13:21 ` [Intel-gfx] [PATCH 5/7] drm/i915/hwmon: Expose card reactive critical power Badal Nilawar
2022-08-25 13:21 ` [Intel-gfx] [PATCH 6/7] drm/i915/hwmon: Expose power1_max_interval Badal Nilawar
2022-08-25 13:21 ` [Intel-gfx] [PATCH 7/7] drm/i915/hwmon: Extend power/energy for XEHPSDV Badal Nilawar
2022-08-30 5:34 ` Dixit, Ashutosh
2022-08-25 14:01 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Add HWMON support (rev5) Patchwork
2022-08-25 14:01 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2022-08-25 14:21 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2022-08-29 20:08 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
-- strict thread matches above, loose matches on Subject: below --
2022-10-13 15:45 [Intel-gfx] [PATCH 0/7] drm/i915: Add HWMON support Ashutosh Dixit
2022-10-13 15:45 ` [Intel-gfx] [PATCH 2/7] drm/i915/hwmon: Add HWMON current voltage support Ashutosh Dixit
2022-09-27 5:50 [Intel-gfx] [PATCH 0/7] drm/i915: Add HWMON support Badal Nilawar
2022-09-27 5:50 ` [Intel-gfx] [PATCH 2/7] drm/i915/hwmon: Add HWMON current voltage support Badal Nilawar
2022-10-03 20:56 ` Andi Shyti
2022-10-13 15:52 ` Dixit, Ashutosh
2022-09-26 17:52 [Intel-gfx] [PATCH 0/7] Add HWMON support Badal Nilawar
2022-09-26 17:52 ` [Intel-gfx] [PATCH 2/7] drm/i915/hwmon: Add HWMON current voltage support Badal Nilawar
2022-09-23 19:56 [Intel-gfx] [PATCH 0/7] drm/i915: Add HWMON support Badal Nilawar
2022-09-23 19:56 ` [Intel-gfx] [PATCH 2/7] drm/i915/hwmon: Add HWMON current voltage support Badal Nilawar
2022-09-16 15:00 [Intel-gfx] [PATCH 0/7] drm/i915: Add HWMON support Badal Nilawar
2022-09-16 15:00 ` [Intel-gfx] [PATCH 2/7] drm/i915/hwmon: Add HWMON current voltage support Badal Nilawar
2022-09-21 11:08 ` Gupta, Anshuman
2022-08-18 19:38 [Intel-gfx] [PATCH 0/7] drm/i915: Add HWMON support Badal Nilawar
2022-08-18 19:38 ` [Intel-gfx] [PATCH 2/7] drm/i915/hwmon: Add HWMON current voltage support Badal Nilawar
2022-08-12 17:37 [Intel-gfx] [PATCH 0/7] drm/i915: Add HWMON support Badal Nilawar
2022-08-12 17:37 ` [Intel-gfx] [PATCH 2/7] drm/i915/hwmon: Add HWMON current voltage support Badal Nilawar
2022-08-12 18:05 ` Guenter Roeck
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