Intel-GFX Archive on lore.kernel.org
 help / color / mirror / Atom feed
From: "Dixit, Ashutosh" <ashutosh.dixit@intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: dri-devel@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH 3/3] drm/i915/mtl: C6 residency and C state type for MTL SAMedia
Date: Mon, 17 Oct 2022 13:12:33 -0700	[thread overview]
Message-ID: <87bkqajjke.wl-ashutosh.dixit@intel.com> (raw)
In-Reply-To: <20221015032618.2458429-4-ashutosh.dixit@intel.com>

On Fri, 14 Oct 2022 20:26:18 -0700, Ashutosh Dixit wrote:
>
> From: Badal Nilawar <badal.nilawar@intel.com>

Hi Badal,

One question below.

> diff --git a/drivers/gpu/drm/i915/gt/intel_gt_pm_debugfs.c b/drivers/gpu/drm/i915/gt/intel_gt_pm_debugfs.c
> index 1fb053cbf52db..3a9bb4387248e 100644
> --- a/drivers/gpu/drm/i915/gt/intel_gt_pm_debugfs.c
> +++ b/drivers/gpu/drm/i915/gt/intel_gt_pm_debugfs.c
> @@ -256,6 +256,61 @@ static int ilk_drpc(struct seq_file *m)
>	return 0;
>  }
>
> +static int mtl_drpc(struct seq_file *m)
> +{

Here we have:

> +	global_forcewake = intel_uncore_read(uncore, FORCEWAKE_GT_GEN9);
and
> +	seq_printf(m, "Global Forcewake Requests: 0x%x\n", global_forcewake);

In gen6_drpc we have:

	mt_fwake_req = intel_uncore_read_fw(uncore, FORCEWAKE_MT);
and
	seq_printf(m, "Multi-threaded Forcewake Request: 0x%x\n", mt_fwake_req);

Also:
	#define FORCEWAKE_MT		_MMIO(0xa188)
	#define FORCEWAKE_GT_GEN9	_MMIO(0xa188)

So they are both the same register. So what is the reason for this
difference, which one should we use?

Also let's have the prints in the same order as gen6_drpc (move fw request
before rc6 residency).

Thanks.
--
Ashutosh

  reply	other threads:[~2022-10-17 20:13 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-10-15  3:26 [Intel-gfx] [PATCH 0/3] i915: CAGF and RC6 changes for MTL Ashutosh Dixit
2022-10-15  3:26 ` [Intel-gfx] [PATCH 1/3] drm/i915/gt: Change RC6 residency functions to accept register ID's Ashutosh Dixit
2022-10-17  8:27   ` Jani Nikula
2022-10-19  5:22     ` Dixit, Ashutosh
2022-10-15  3:26 ` [Intel-gfx] [PATCH 2/3] drm/i915/mtl: Modify CAGF functions for MTL Ashutosh Dixit
2022-10-15  3:26 ` [Intel-gfx] [PATCH 3/3] drm/i915/mtl: C6 residency and C state type for MTL SAMedia Ashutosh Dixit
2022-10-17 20:12   ` Dixit, Ashutosh [this message]
2022-10-19 23:41     ` Dixit, Ashutosh
2022-10-15  4:03 ` [Intel-gfx] ✓ Fi.CI.BAT: success for i915: CAGF and RC6 changes for MTL (rev5) Patchwork
2022-10-15  5:21 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=87bkqajjke.wl-ashutosh.dixit@intel.com \
    --to=ashutosh.dixit@intel.com \
    --cc=dri-devel@lists.freedesktop.org \
    --cc=intel-gfx@lists.freedesktop.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox