From: Mika Kuoppala <mika.kuoppala@linux.intel.com>
To: Chris Wilson <chris@chris-wilson.co.uk>, intel-gfx@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH 3/3] drm/i915: Try hard to bind the context
Date: Tue, 03 Dec 2019 15:24:03 +0200 [thread overview]
Message-ID: <87blspv8y4.fsf@gaia.fi.intel.com> (raw)
In-Reply-To: <20191202204316.2665847-3-chris@chris-wilson.co.uk>
Chris Wilson <chris@chris-wilson.co.uk> writes:
> It is not acceptable for context pinning to fail with -ENOSPC as we
> should always be able to make space in the GGTT. The only reason we may
> fail is that other "temporary" context pins are reserving their space
> and we need to wait for an available slot.
>
> Closes: https://gitlab.freedesktop.org/drm/intel/issues/676
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> ---
> drivers/gpu/drm/i915/i915_gem_gtt.c | 21 ++++++++++++++++++---
> 1 file changed, 18 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
> index 10b3d6d44045..7e20c6f62cd5 100644
> --- a/drivers/gpu/drm/i915/i915_gem_gtt.c
> +++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
> @@ -1934,9 +1934,24 @@ int gen6_ppgtt_pin(struct i915_ppgtt *base)
> * size. We allocate at the top of the GTT to avoid fragmentation.
> */
> if (!atomic_read(&ppgtt->pin_count)) {
> - err = i915_vma_pin(ppgtt->vma,
> - 0, GEN6_PD_ALIGN,
> - PIN_GLOBAL | PIN_HIGH);
> + do {
> + struct i915_address_space *vm = ppgtt->vma->vm;
> +
> + err = i915_vma_pin(ppgtt->vma,
> + 0, GEN6_PD_ALIGN,
> + PIN_GLOBAL | PIN_HIGH);
> + if (err != -ENOSPC)
> + break;
> +
> + /* We don't take no for an answer! */
> + err = mutex_lock_interruptible(&vm->mutex);
> + if (err == 0) {
> + err = i915_gem_evict_vm(vm);
Why would we hold any significant amount of vmas?
I thought we need to kick the ggtt hard in order for this
to fit in.
-Mika
> + mutex_unlock(&vm->mutex);
> + }
> + if (err)
> + break;
> + } while (1);
> }
> if (!err)
> atomic_inc(&ppgtt->pin_count);
> --
> 2.24.0
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
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next prev parent reply other threads:[~2019-12-03 13:24 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-12-02 20:43 [PATCH 1/3] drm/i915: Lift i915_vma_pin() out of intel_renderstate_emit() Chris Wilson
2019-12-02 20:43 ` [Intel-gfx] " Chris Wilson
2019-12-02 20:43 ` [PATCH 2/3] drm/i915: Ignore most failures during evict-vm Chris Wilson
2019-12-02 20:43 ` [Intel-gfx] " Chris Wilson
2019-12-02 20:43 ` [PATCH 3/3] drm/i915: Try hard to bind the context Chris Wilson
2019-12-02 20:43 ` [Intel-gfx] " Chris Wilson
2019-12-03 13:24 ` Mika Kuoppala [this message]
2019-12-03 13:28 ` Chris Wilson
2019-12-02 21:39 ` ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/3] drm/i915: Lift i915_vma_pin() out of intel_renderstate_emit() Patchwork
2019-12-02 21:39 ` [Intel-gfx] " Patchwork
2019-12-02 22:01 ` ✓ Fi.CI.BAT: success " Patchwork
2019-12-02 22:01 ` [Intel-gfx] " Patchwork
2019-12-03 3:36 ` ✗ Fi.CI.IGT: failure " Patchwork
2019-12-03 3:36 ` [Intel-gfx] " Patchwork
2019-12-03 13:16 ` [Intel-gfx] [PATCH 1/3] " Mika Kuoppala
-- strict thread matches above, loose matches on Subject: below --
2019-12-02 10:44 [PATCH 1/3] drm/i915: Manually flush barriers on eviction Chris Wilson
2019-12-02 10:44 ` [PATCH 3/3] drm/i915: Try hard to bind the context Chris Wilson
2019-12-02 10:44 ` [Intel-gfx] " Chris Wilson
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