From: Jani Nikula <jani.nikula@linux.intel.com>
To: Lyude Paul <lyude@redhat.com>,
dri-devel@lists.freedesktop.org, intel-gfx@lists.freedesktop.org,
nouveau@lists.freedesktop.org
Cc: Thomas Zimmermann <tzimmermann@suse.de>,
David Airlie <airlied@linux.ie>,
Lucas De Marchi <lucas.demarchi@intel.com>,
open list <linux-kernel@vger.kernel.org>,
Maxime Ripard <mripard@kernel.org>,
Wambui Karuga <wambui.karugax@gmail.com>
Subject: Re: [Intel-gfx] [PATCH v5 09/20] drm/i915/dp: Extract drm_dp_read_mst_cap()
Date: Thu, 27 Aug 2020 16:50:46 +0300 [thread overview]
Message-ID: <87d03c5hah.fsf@intel.com> (raw)
In-Reply-To: <20200826182456.322681-10-lyude@redhat.com>
On Wed, 26 Aug 2020, Lyude Paul <lyude@redhat.com> wrote:
> Just a tiny drive-by cleanup, we can consolidate i915's code for
> checking for MST support into a helper to be shared across drivers.
>
> v5:
> * Drop !!()
> * Move drm_dp_has_mst() out of header
> * Change name from drm_dp_has_mst() to drm_dp_read_mst_cap()
>
> Signed-off-by: Lyude Paul <lyude@redhat.com>
> Reviewed-by: Sean Paul <sean@poorly.run>
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
> ---
> drivers/gpu/drm/drm_dp_mst_topology.c | 22 ++++++++++++++++++++++
> drivers/gpu/drm/i915/display/intel_dp.c | 18 ++----------------
> include/drm/drm_dp_mst_helper.h | 3 +--
> 3 files changed, 25 insertions(+), 18 deletions(-)
>
> diff --git a/drivers/gpu/drm/drm_dp_mst_topology.c b/drivers/gpu/drm/drm_dp_mst_topology.c
> index 67dd72ea200e0..17dbed0a9800d 100644
> --- a/drivers/gpu/drm/drm_dp_mst_topology.c
> +++ b/drivers/gpu/drm/drm_dp_mst_topology.c
> @@ -3486,6 +3486,28 @@ static int drm_dp_get_vc_payload_bw(u8 dp_link_bw, u8 dp_link_count)
> return dp_link_bw * dp_link_count / 2;
> }
>
> +/**
> + * drm_dp_read_mst_cap() - check whether or not a sink supports MST
> + * @aux: The DP AUX channel to use
> + * @dpcd: A cached copy of the DPCD capabilities for this sink
> + *
> + * Returns: %True if the sink supports MST, %false otherwise
> + */
> +bool drm_dp_read_mst_cap(struct drm_dp_aux *aux,
> + const u8 dpcd[DP_RECEIVER_CAP_SIZE])
> +{
> + u8 mstm_cap;
> +
> + if (dpcd[DP_DPCD_REV] < DP_DPCD_REV_12)
> + return false;
> +
> + if (drm_dp_dpcd_readb(aux, DP_MSTM_CAP, &mstm_cap) != 1)
> + return false;
> +
> + return mstm_cap & DP_MST_CAP;
> +}
> +EXPORT_SYMBOL(drm_dp_read_mst_cap);
> +
> /**
> * drm_dp_mst_topology_mgr_set_mst() - Set the MST state for a topology manager
> * @mgr: manager to set state for
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
> index 79c27f91f42c0..4c7314b7a84e4 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -4699,20 +4699,6 @@ intel_dp_get_dpcd(struct intel_dp *intel_dp)
> return true;
> }
>
> -static bool
> -intel_dp_sink_can_mst(struct intel_dp *intel_dp)
> -{
> - u8 mstm_cap;
> -
> - if (intel_dp->dpcd[DP_DPCD_REV] < 0x12)
> - return false;
> -
> - if (drm_dp_dpcd_readb(&intel_dp->aux, DP_MSTM_CAP, &mstm_cap) != 1)
> - return false;
> -
> - return mstm_cap & DP_MST_CAP;
> -}
> -
> static bool
> intel_dp_can_mst(struct intel_dp *intel_dp)
> {
> @@ -4720,7 +4706,7 @@ intel_dp_can_mst(struct intel_dp *intel_dp)
>
> return i915->params.enable_dp_mst &&
> intel_dp->can_mst &&
> - intel_dp_sink_can_mst(intel_dp);
> + drm_dp_read_mst_cap(&intel_dp->aux, intel_dp->dpcd);
> }
>
> static void
> @@ -4729,7 +4715,7 @@ intel_dp_configure_mst(struct intel_dp *intel_dp)
> struct drm_i915_private *i915 = dp_to_i915(intel_dp);
> struct intel_encoder *encoder =
> &dp_to_dig_port(intel_dp)->base;
> - bool sink_can_mst = intel_dp_sink_can_mst(intel_dp);
> + bool sink_can_mst = drm_dp_read_mst_cap(&intel_dp->aux, intel_dp->dpcd);
>
> drm_dbg_kms(&i915->drm,
> "[ENCODER:%d:%s] MST support: port: %s, sink: %s, modparam: %s\n",
> diff --git a/include/drm/drm_dp_mst_helper.h b/include/drm/drm_dp_mst_helper.h
> index 8b9eb4db3381c..6ae5860d8644e 100644
> --- a/include/drm/drm_dp_mst_helper.h
> +++ b/include/drm/drm_dp_mst_helper.h
> @@ -728,10 +728,9 @@ int drm_dp_mst_topology_mgr_init(struct drm_dp_mst_topology_mgr *mgr,
>
> void drm_dp_mst_topology_mgr_destroy(struct drm_dp_mst_topology_mgr *mgr);
>
> -
> +bool drm_dp_read_mst_cap(struct drm_dp_aux *aux, const u8 dpcd[DP_RECEIVER_CAP_SIZE]);
> int drm_dp_mst_topology_mgr_set_mst(struct drm_dp_mst_topology_mgr *mgr, bool mst_state);
>
> -
> int drm_dp_mst_hpd_irq(struct drm_dp_mst_topology_mgr *mgr, u8 *esi, bool *handled);
--
Jani Nikula, Intel Open Source Graphics Center
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
next prev parent reply other threads:[~2020-08-27 13:51 UTC|newest]
Thread overview: 28+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-08-26 18:24 [Intel-gfx] [PATCH v5 00/20] drm/dp, i915, nouveau: Cleanup nouveau HPD and add DP features from i915 Lyude Paul
2020-08-26 18:24 ` [Intel-gfx] [PATCH v5 01/20] drm/nouveau/kms: Fix some indenting in nouveau_dp_detect() Lyude Paul
2020-08-26 18:24 ` [Intel-gfx] [PATCH v5 02/20] drm/nouveau/kms/nv50-: Remove open-coded drm_dp_read_desc() Lyude Paul
2020-08-26 18:24 ` [Intel-gfx] [PATCH v5 03/20] drm/nouveau/kms/nv50-: Just use drm_dp_dpcd_read() in nouveau_dp.c Lyude Paul
2020-08-26 18:24 ` [Intel-gfx] [PATCH v5 04/20] drm/nouveau/kms/nv50-: Use macros for DP registers " Lyude Paul
2020-08-26 18:24 ` [Intel-gfx] [PATCH v5 05/20] drm/nouveau/kms: Don't clear DP_MST_CTRL DPCD in nv50_mstm_new() Lyude Paul
2020-08-26 18:24 ` [Intel-gfx] [PATCH v5 06/20] drm/nouveau/kms: Search for encoders' connectors properly Lyude Paul
2020-08-26 18:24 ` [Intel-gfx] [PATCH v5 07/20] drm/nouveau/kms/nv50-: Use drm_dp_dpcd_(readb|writeb)() in nv50_sor_disable() Lyude Paul
2020-08-26 18:24 ` [Intel-gfx] [PATCH v5 08/20] drm/nouveau/kms/nv50-: Refactor and cleanup DP HPD handling Lyude Paul
2020-08-26 18:24 ` [Intel-gfx] [PATCH v5 09/20] drm/i915/dp: Extract drm_dp_read_mst_cap() Lyude Paul
2020-08-27 13:50 ` Jani Nikula [this message]
2020-08-26 18:24 ` [Intel-gfx] [PATCH v5 10/20] drm/nouveau/kms: Use new drm_dp_read_mst_cap() helper for checking MST caps Lyude Paul
2020-08-26 18:24 ` [Intel-gfx] [PATCH v5 11/20] drm/nouveau/kms: Move drm_dp_cec_unset_edid() into nouveau_connector_detect() Lyude Paul
2020-08-26 18:24 ` [Intel-gfx] [PATCH v5 12/20] drm/nouveau/kms: Only use hpd_work for reprobing in HPD paths Lyude Paul
2020-08-26 18:24 ` [Intel-gfx] [PATCH v5 13/20] drm/i915/dp: Extract drm_dp_read_downstream_info() Lyude Paul
2020-08-27 14:09 ` Jani Nikula
2020-08-26 18:24 ` [Intel-gfx] [PATCH v5 14/20] drm/nouveau/kms/nv50-: Use downstream DP clock limits for mode validation Lyude Paul
2020-09-17 16:45 ` Ville Syrjälä
2020-08-26 18:24 ` [Intel-gfx] [PATCH v5 15/20] drm/i915/dp: Extract drm_dp_read_sink_count_cap() Lyude Paul
2020-08-26 18:24 ` [Intel-gfx] [PATCH v5 16/20] drm/i915/dp: Extract drm_dp_read_sink_count() Lyude Paul
2020-08-26 18:24 ` [Intel-gfx] [PATCH v5 17/20] drm/nouveau/kms/nv50-: Add support for DP_SINK_COUNT Lyude Paul
2020-08-26 18:24 ` [Intel-gfx] [PATCH v5 18/20] drm/nouveau/kms: Don't change EDID when it hasn't actually changed Lyude Paul
2020-08-26 18:24 ` [Intel-gfx] [PATCH v5 19/20] drm/i915/dp: Extract drm_dp_read_dpcd_caps() Lyude Paul
2020-08-26 18:24 ` [Intel-gfx] [PATCH v5 20/20] drm/nouveau/kms: Start using drm_dp_read_dpcd_caps() Lyude Paul
2020-08-26 19:07 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/dp, i915, nouveau: Cleanup nouveau HPD and add DP features from i915 (rev7) Patchwork
2020-08-26 19:09 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2020-08-26 19:26 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2020-08-27 2:50 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
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