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From: Jani Nikula <jani.nikula@linux.intel.com>
To: Ville Syrjala <ville.syrjala@linux.intel.com>,
	intel-gfx@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH v2 5/6] drm/i915: Wait for LVDS panel power cycle delay on reboot
Date: Tue, 06 Oct 2020 12:31:10 +0300	[thread overview]
Message-ID: <87imbnk8f5.fsf@intel.com> (raw)
In-Reply-To: <20201001151640.14590-5-ville.syrjala@linux.intel.com>

On Thu, 01 Oct 2020, Ville Syrjala <ville.syrjala@linux.intel.com> wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> Just like with eDP let's wait for the power sequencer power
> cycle delay before we reboot the machine, as otherwise we
> can't guarantee the panel's minimum power cycle delay will
> be respected.
>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_lvds.c | 10 ++++++++++
>  1 file changed, 10 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_lvds.c b/drivers/gpu/drm/i915/display/intel_lvds.c
> index e65c2de522c3..c6c7c0b9989b 100644
> --- a/drivers/gpu/drm/i915/display/intel_lvds.c
> +++ b/drivers/gpu/drm/i915/display/intel_lvds.c
> @@ -371,6 +371,15 @@ static void pch_post_disable_lvds(struct intel_atomic_state *state,
>  	intel_disable_lvds(state, encoder, old_crtc_state, old_conn_state);
>  }
>  
> +static void intel_lvds_shutdown(struct intel_encoder *encoder)
> +{
> +	struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
> +
> +	if (intel_de_wait_for_clear(dev_priv, PP_STATUS(0), PP_CYCLE_DELAY_ACTIVE, 5000))

I guess we'll be seeing reports if we hit the 5s delay. :|

Reviewed-by: Jani Nikula <jani.nikula@intel.com>


> +		drm_err(&dev_priv->drm,
> +			"timed out waiting for panel power cycle delay\n");
> +}
> +
>  static enum drm_mode_status
>  intel_lvds_mode_valid(struct drm_connector *connector,
>  		      struct drm_display_mode *mode)
> @@ -897,6 +906,7 @@ void intel_lvds_init(struct drm_i915_private *dev_priv)
>  	intel_encoder->get_hw_state = intel_lvds_get_hw_state;
>  	intel_encoder->get_config = intel_lvds_get_config;
>  	intel_encoder->update_pipe = intel_panel_update_backlight;
> +	intel_encoder->shutdown = intel_lvds_shutdown;
>  	intel_connector->get_hw_state = intel_connector_get_hw_state;
>  
>  	intel_connector_attach_encoder(intel_connector, intel_encoder);

-- 
Jani Nikula, Intel Open Source Graphics Center
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

  reply	other threads:[~2020-10-06  9:30 UTC|newest]

Thread overview: 19+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-10-01 15:16 [Intel-gfx] [PATCH v2 1/6] drm/i915: Shut down displays gracefully on reboot Ville Syrjala
2020-10-01 15:16 ` [Intel-gfx] [PATCH v2 2/6] drm/i915: Add an encoder .shutdown() hook Ville Syrjala
2020-10-06  9:15   ` Jani Nikula
2020-10-01 15:16 ` [Intel-gfx] [PATCH v2 3/6] drm/i915: Replace the VLV/CHV eDP reboot notifier with the " Ville Syrjala
2020-10-06  9:29   ` Jani Nikula
2020-10-06 13:43     ` Ville Syrjälä
2020-10-06 18:13       ` Jani Nikula
2020-10-06 18:33         ` Ville Syrjälä
2020-10-01 15:16 ` [Intel-gfx] [PATCH v2 4/6] drm/i915: Wait for eDP panel power cycle delay on reboot on all platforms Ville Syrjala
2020-10-06  9:30   ` Jani Nikula
2020-10-01 15:16 ` [Intel-gfx] [PATCH v2 5/6] drm/i915: Wait for LVDS panel power cycle delay on reboot Ville Syrjala
2020-10-06  9:31   ` Jani Nikula [this message]
2020-10-01 15:16 ` [Intel-gfx] [PATCH v2 6/6] drm/i915: Wait for VLV/CHV/BXT/GLK DSI " Ville Syrjala
2020-10-06  9:31   ` Jani Nikula
2020-10-01 15:36 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for series starting with [v2,1/6] drm/i915: Shut down displays gracefully " Patchwork
2020-10-01 15:57 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2020-10-01 17:28 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
2020-10-06  9:14 ` [Intel-gfx] [PATCH v2 1/6] " Jani Nikula
2020-10-06  9:58 ` Chris Wilson

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