From: Jani Nikula <jani.nikula@linux.intel.com>
To: Ankit Nautiyal <ankit.k.nautiyal@intel.com>,
intel-gfx@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH] i915: Fix HAS_LSPCON macro for platforms between GEN9 and GEN10
Date: Mon, 08 Feb 2021 12:29:46 +0200 [thread overview]
Message-ID: <87lfbyett1.fsf@intel.com> (raw)
In-Reply-To: <20210208055554.24357-1-ankit.k.nautiyal@intel.com>
Subject prefix: drm/i915:
On Mon, 08 Feb 2021, Ankit Nautiyal <ankit.k.nautiyal@intel.com> wrote:
> Legacy LSPCON chip from MCA and Parade is only used for platforms
> between GEN9 and GEN10. Fixing the HAS_LSPCON macro to reflect the same.
>
> Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
I cringe at the VBT having the bit set anyway, but
Acked-by: Jani Nikula <jani.nikula@intel.com>
> ---
> drivers/gpu/drm/i915/i915_drv.h | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index 4fc9a8691873..fd04fc434ca6 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -1763,7 +1763,7 @@ tgl_stepping_get(struct drm_i915_private *dev_priv)
>
> #define HAS_GMCH(dev_priv) (INTEL_INFO(dev_priv)->display.has_gmch)
>
> -#define HAS_LSPCON(dev_priv) (INTEL_GEN(dev_priv) >= 9)
> +#define HAS_LSPCON(dev_priv) (IS_GEN_RANGE(dev_priv, 9, 10))
>
> /* DPF == dynamic parity feature */
> #define HAS_L3_DPF(dev_priv) (INTEL_INFO(dev_priv)->has_l3_dpf)
--
Jani Nikula, Intel Open Source Graphics Center
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next prev parent reply other threads:[~2021-02-08 10:29 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-02-08 5:55 [Intel-gfx] [PATCH] i915: Fix HAS_LSPCON macro for platforms between GEN9 and GEN10 Ankit Nautiyal
2021-02-08 8:06 ` [Intel-gfx] ✓ Fi.CI.BAT: success for " Patchwork
2021-02-08 9:41 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
2021-02-08 10:29 ` Jani Nikula [this message]
2021-02-08 11:11 ` [Intel-gfx] [PATCH] " Jani Nikula
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