From: Jani Nikula <jani.nikula@intel.com>
To: Lucas De Marchi <lucas.demarchi@intel.com>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH] drm/i915/gt: rename DBG() to GTT_TRACE()
Date: Mon, 11 Sep 2023 18:25:03 +0300 [thread overview]
Message-ID: <87r0n4enqo.fsf@intel.com> (raw)
In-Reply-To: <wetll4dmmg36536akmjgdotyiai73nsljllumo7foyac4z5g6e@p2o6lxujxpfp>
On Mon, 11 Sep 2023, Lucas De Marchi <lucas.demarchi@intel.com> wrote:
> On Mon, Sep 11, 2023 at 03:33:05PM +0300, Jani Nikula wrote:
>>intel_gtt.h is indirectly included absolutely everywhere in the
>>driver. DBG() is too short a name. Rename it GTT_TRACE() after
>>GEM_TRACE().
>>
>>Signed-off-by: Jani Nikula <jani.nikula@intel.com>
>>---
>> drivers/gpu/drm/i915/gt/gen8_ppgtt.c | 36 ++++++++++++++--------------
>
> I like the new name. However since this is the only file actually using
> it, why not move the define there too?
Heh, I did that at first, but then moved it back, undecided.
Maybe you can send a patch on top moving it. ;D
>
> Other than that,
>
> Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>
Thanks,
Jani.
>
> thanks
> Lucas De Marchi
>
>> drivers/gpu/drm/i915/gt/intel_gtt.h | 4 ++--
>> 2 files changed, 20 insertions(+), 20 deletions(-)
>>
>>diff --git a/drivers/gpu/drm/i915/gt/gen8_ppgtt.c b/drivers/gpu/drm/i915/gt/gen8_ppgtt.c
>>index c8568e5d1147..9895e18df043 100644
>>--- a/drivers/gpu/drm/i915/gt/gen8_ppgtt.c
>>+++ b/drivers/gpu/drm/i915/gt/gen8_ppgtt.c
>>@@ -242,9 +242,9 @@ static u64 __gen8_ppgtt_clear(struct i915_address_space * const vm,
>> GEM_BUG_ON(end > vm->total >> GEN8_PTE_SHIFT);
>>
>> len = gen8_pd_range(start, end, lvl--, &idx);
>>- DBG("%s(%p):{ lvl:%d, start:%llx, end:%llx, idx:%d, len:%d, used:%d }\n",
>>- __func__, vm, lvl + 1, start, end,
>>- idx, len, atomic_read(px_used(pd)));
>>+ GTT_TRACE("%s(%p):{ lvl:%d, start:%llx, end:%llx, idx:%d, len:%d, used:%d }\n",
>>+ __func__, vm, lvl + 1, start, end,
>>+ idx, len, atomic_read(px_used(pd)));
>> GEM_BUG_ON(!len || len >= atomic_read(px_used(pd)));
>>
>> do {
>>@@ -252,8 +252,8 @@ static u64 __gen8_ppgtt_clear(struct i915_address_space * const vm,
>>
>> if (atomic_fetch_inc(&pt->used) >> gen8_pd_shift(1) &&
>> gen8_pd_contains(start, end, lvl)) {
>>- DBG("%s(%p):{ lvl:%d, idx:%d, start:%llx, end:%llx } removing pd\n",
>>- __func__, vm, lvl + 1, idx, start, end);
>>+ GTT_TRACE("%s(%p):{ lvl:%d, idx:%d, start:%llx, end:%llx } removing pd\n",
>>+ __func__, vm, lvl + 1, idx, start, end);
>> clear_pd_entry(pd, idx, scratch);
>> __gen8_ppgtt_cleanup(vm, as_pd(pt), I915_PDES, lvl);
>> start += (u64)I915_PDES << gen8_pd_shift(lvl);
>>@@ -270,10 +270,10 @@ static u64 __gen8_ppgtt_clear(struct i915_address_space * const vm,
>> u64 *vaddr;
>>
>> count = gen8_pt_count(start, end);
>>- DBG("%s(%p):{ lvl:%d, start:%llx, end:%llx, idx:%d, len:%d, used:%d } removing pte\n",
>>- __func__, vm, lvl, start, end,
>>- gen8_pd_index(start, 0), count,
>>- atomic_read(&pt->used));
>>+ GTT_TRACE("%s(%p):{ lvl:%d, start:%llx, end:%llx, idx:%d, len:%d, used:%d } removing pte\n",
>>+ __func__, vm, lvl, start, end,
>>+ gen8_pd_index(start, 0), count,
>>+ atomic_read(&pt->used));
>> GEM_BUG_ON(!count || count >= atomic_read(&pt->used));
>>
>> num_ptes = count;
>>@@ -325,9 +325,9 @@ static void __gen8_ppgtt_alloc(struct i915_address_space * const vm,
>> GEM_BUG_ON(end > vm->total >> GEN8_PTE_SHIFT);
>>
>> len = gen8_pd_range(*start, end, lvl--, &idx);
>>- DBG("%s(%p):{ lvl:%d, start:%llx, end:%llx, idx:%d, len:%d, used:%d }\n",
>>- __func__, vm, lvl + 1, *start, end,
>>- idx, len, atomic_read(px_used(pd)));
>>+ GTT_TRACE("%s(%p):{ lvl:%d, start:%llx, end:%llx, idx:%d, len:%d, used:%d }\n",
>>+ __func__, vm, lvl + 1, *start, end,
>>+ idx, len, atomic_read(px_used(pd)));
>> GEM_BUG_ON(!len || (idx + len - 1) >> gen8_pd_shift(1));
>>
>> spin_lock(&pd->lock);
>>@@ -338,8 +338,8 @@ static void __gen8_ppgtt_alloc(struct i915_address_space * const vm,
>> if (!pt) {
>> spin_unlock(&pd->lock);
>>
>>- DBG("%s(%p):{ lvl:%d, idx:%d } allocating new tree\n",
>>- __func__, vm, lvl + 1, idx);
>>+ GTT_TRACE("%s(%p):{ lvl:%d, idx:%d } allocating new tree\n",
>>+ __func__, vm, lvl + 1, idx);
>>
>> pt = stash->pt[!!lvl];
>> __i915_gem_object_pin_pages(pt->base);
>>@@ -369,10 +369,10 @@ static void __gen8_ppgtt_alloc(struct i915_address_space * const vm,
>> } else {
>> unsigned int count = gen8_pt_count(*start, end);
>>
>>- DBG("%s(%p):{ lvl:%d, start:%llx, end:%llx, idx:%d, len:%d, used:%d } inserting pte\n",
>>- __func__, vm, lvl, *start, end,
>>- gen8_pd_index(*start, 0), count,
>>- atomic_read(&pt->used));
>>+ GTT_TRACE("%s(%p):{ lvl:%d, start:%llx, end:%llx, idx:%d, len:%d, used:%d } inserting pte\n",
>>+ __func__, vm, lvl, *start, end,
>>+ gen8_pd_index(*start, 0), count,
>>+ atomic_read(&pt->used));
>>
>> atomic_add(count, &pt->used);
>> /* All other pdes may be simultaneously removed */
>>diff --git a/drivers/gpu/drm/i915/gt/intel_gtt.h b/drivers/gpu/drm/i915/gt/intel_gtt.h
>>index 4d6296cdbcfd..346ec8ec2edd 100644
>>--- a/drivers/gpu/drm/i915/gt/intel_gtt.h
>>+++ b/drivers/gpu/drm/i915/gt/intel_gtt.h
>>@@ -35,9 +35,9 @@
>> #define I915_GFP_ALLOW_FAIL (GFP_KERNEL | __GFP_RETRY_MAYFAIL | __GFP_NOWARN)
>>
>> #if IS_ENABLED(CONFIG_DRM_I915_TRACE_GTT)
>>-#define DBG(...) trace_printk(__VA_ARGS__)
>>+#define GTT_TRACE(...) trace_printk(__VA_ARGS__)
>> #else
>>-#define DBG(...)
>>+#define GTT_TRACE(...)
>> #endif
>>
>> #define NALLOC 3 /* 1 normal, 1 for concurrent threads, 1 for preallocation */
>>--
>>2.39.2
>>
--
Jani Nikula, Intel Open Source Graphics Center
next prev parent reply other threads:[~2023-09-11 15:25 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-09-11 12:33 [Intel-gfx] [PATCH] drm/i915/gt: rename DBG() to GTT_TRACE() Jani Nikula
2023-09-11 13:32 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for " Patchwork
2023-09-11 13:32 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2023-09-11 13:46 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2023-09-11 14:45 ` [Intel-gfx] [PATCH] " Lucas De Marchi
2023-09-11 15:25 ` Jani Nikula [this message]
2023-09-12 8:19 ` Jani Nikula
2023-09-11 17:29 ` [Intel-gfx] ✗ Fi.CI.IGT: failure for " Patchwork
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=87r0n4enqo.fsf@intel.com \
--to=jani.nikula@intel.com \
--cc=intel-gfx@lists.freedesktop.org \
--cc=lucas.demarchi@intel.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox