Re: [Intel-gfx] [PATCH] drm/i915: Make utility pin asserts more accurate

[Jani Nikula <jani.nikula@linux.intel.com>]

On Tue, 28 Mar 2023, Ville Syrjala <ville.syrjala@linux.intel.com> wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> Only the PWM output mode of the utility pin is incompatible
> with DC6/LCPLL disable. Check for that specifically.
>
> References: https://gitlab.freedesktop.org/drm/intel/-/issues/6609
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

It's an improvement.

Reviewed-by: Jani Nikula <jani.nikula@intel.com>

However, I do think it's wrong to have both these files poke at random
registers directly to check for stuff. Should be abstracted better.

> ---
>  drivers/gpu/drm/i915/display/intel_display_power.c      | 6 ++++--
>  drivers/gpu/drm/i915/display/intel_display_power_well.c | 6 ++++--
>  2 files changed, 8 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display_power.c b/drivers/gpu/drm/i915/display/intel_display_power.c
> index f86060195987..ff787bd42573 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_power.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_power.c
> @@ -1182,8 +1182,10 @@ static void assert_can_disable_lcpll(struct drm_i915_private *dev_priv)
>  				"CPU PWM2 enabled\n");
>  	I915_STATE_WARN(intel_de_read(dev_priv, BLC_PWM_PCH_CTL1) & BLM_PCH_PWM_ENABLE,
>  			"PCH PWM1 enabled\n");
> -	I915_STATE_WARN(intel_de_read(dev_priv, UTIL_PIN_CTL) & UTIL_PIN_ENABLE,
> -			"Utility pin enabled\n");
> +	I915_STATE_WARN((intel_de_read(dev_priv, UTIL_PIN_CTL) &
> +			 (UTIL_PIN_ENABLE | UTIL_PIN_MODE_MASK)) ==
> +			(UTIL_PIN_ENABLE | UTIL_PIN_MODE_PWM),
> +			"Utility pin enabled in PWM mode\n");
>  	I915_STATE_WARN(intel_de_read(dev_priv, PCH_GTC_CTL) & PCH_GTC_ENABLE,
>  			"PCH GTC enabled\n");
>  
> diff --git a/drivers/gpu/drm/i915/display/intel_display_power_well.c b/drivers/gpu/drm/i915/display/intel_display_power_well.c
> index 1676df1dc066..c694f28e6b2e 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_power_well.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_power_well.c
> @@ -818,8 +818,10 @@ void gen9_enable_dc5(struct drm_i915_private *dev_priv)
>  static void assert_can_enable_dc6(struct drm_i915_private *dev_priv)
>  {
>  	drm_WARN_ONCE(&dev_priv->drm,
> -		      intel_de_read(dev_priv, UTIL_PIN_CTL) & UTIL_PIN_ENABLE,
> -		      "Backlight is not disabled.\n");
> +		      (intel_de_read(dev_priv, UTIL_PIN_CTL) &
> +		       (UTIL_PIN_ENABLE | UTIL_PIN_MODE_MASK)) ==
> +		      (UTIL_PIN_ENABLE | UTIL_PIN_MODE_PWM),
> +		      "Utility pin enabled in PWM mode\n");
>  	drm_WARN_ONCE(&dev_priv->drm,
>  		      (intel_de_read(dev_priv, DC_STATE_EN) &
>  		       DC_STATE_EN_UPTO_DC6),

-- 
Jani Nikula, Intel Open Source Graphics Center