From: Jani Nikula <jani.nikula@linux.intel.com>
To: Chris Wilson <chris@chris-wilson.co.uk>, intel-gfx@lists.freedesktop.org
Subject: Re: [CI 3/5] drm/i915: Disable semaphores on Sandybridge
Date: Tue, 21 Nov 2017 11:57:30 +0200 [thread overview]
Message-ID: <87r2ssuf79.fsf@intel.com> (raw)
In-Reply-To: <20171120205504.21892-3-chris@chris-wilson.co.uk>
On Mon, 20 Nov 2017, Chris Wilson <chris@chris-wilson.co.uk> wrote:
> I should have admitted defeat long ago as there has been a rare but
> persistent error on Sandybridge where semaphore signaling did not
> propagate to the waiter, leading to a GPU hang.
I'm late to the party, but I think the choice of patch ordering here is
a bit unfortunate. Or is it intentional that you can't backport this to
stable as-is?
BR,
Jani.
>
> With the work on fence signaling for v4.9, the impact of using CPU driven
> signaling was greatly reduced wrt to the latency of GPU semaphores,
> though without logical rings support, the benefit of reordering work to
> avoid bubbles is not realised (i.e. as it stands fence signaling is just
> a slower, more costly version of HW semaphores; but works more
> consistently). As a rough indicator of the difference,
>
> with semaphores:
> Sequential (3 engines, 1 processes): average 5.470us per cycle [expected 4.988us]
> w/o semaphores:
> Sequential (3 engines, 1 processes): average 15.771us per cycle [expected 4.923us]
>
> In comparison, v3.4:
> with semaphores:
> Sequential (3 engines, 1 processes): average 16.066us per cycle [expected 11.842us]
> w/o semaphores:
> Sequential (3 engines, 1 processes): average 23.460us per cycle [expected 11.839us]
>
> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=54226 #and 100+ dupes
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
> Acked-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
> Reviewed-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
> ---
> drivers/gpu/drm/i915/i915_gem.c | 10 +---------
> 1 file changed, 1 insertion(+), 9 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
> index d470e10b2edd..d53bb8e872ba 100644
> --- a/drivers/gpu/drm/i915/i915_gem.c
> +++ b/drivers/gpu/drm/i915/i915_gem.c
> @@ -4999,20 +4999,12 @@ int i915_gem_init_hw(struct drm_i915_private *dev_priv)
>
> bool intel_sanitize_semaphores(struct drm_i915_private *dev_priv, int value)
> {
> - if (INTEL_GEN(dev_priv) < 6)
> - return false;
> -
> - /* TODO: make semaphores and Execlists play nicely together */
> - if (HAS_EXECLISTS(dev_priv))
> + if (!IS_GEN7(dev_priv))
> return false;
>
> if (value >= 0)
> return value;
>
> - /* Enable semaphores on SNB when IO remapping is off */
> - if (IS_GEN6(dev_priv) && intel_vtd_active())
> - return false;
> -
> return true;
> }
--
Jani Nikula, Intel Open Source Technology Center
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next prev parent reply other threads:[~2017-11-21 9:57 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-11-20 20:55 [CI 1/5] drm/i915: Remove i915.enable_execlists module parameter Chris Wilson
2017-11-20 20:55 ` [CI 2/5] drm/i915: Remove obsolete ringbuffer emission for gen8+ Chris Wilson
2017-11-20 20:55 ` [CI 3/5] drm/i915: Disable semaphores on Sandybridge Chris Wilson
2017-11-21 9:57 ` Jani Nikula [this message]
2017-11-21 10:06 ` Chris Wilson
2017-11-21 10:23 ` Jani Nikula
2017-11-21 10:39 ` Chris Wilson
2017-11-20 20:55 ` [CI 4/5] drm/i915: Move debugfs/i915_semaphore_status to i915_engine_info Chris Wilson
2017-11-20 20:55 ` [CI 5/5] drm/i915: Remove i915.semaphores modparam Chris Wilson
2017-11-20 21:40 ` ✓ Fi.CI.BAT: success for series starting with [CI,1/5] drm/i915: Remove i915.enable_execlists module parameter Patchwork
2017-11-20 22:46 ` ✗ Fi.CI.IGT: warning " Patchwork
-- strict thread matches above, loose matches on Subject: below --
2017-11-20 16:04 [CI 1/5] " Chris Wilson
2017-11-20 16:04 ` [CI 3/5] drm/i915: Disable semaphores on Sandybridge Chris Wilson
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