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From: Jani Nikula <jani.nikula@intel.com>
To: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
Cc: intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org,
	Arun R Murthy <arun.r.murthy@intel.com>
Subject: Re: [RFC 4/4] drm/i915/mst: enable MST mode for 128b/132b single-stream sideband
Date: Mon, 12 Feb 2024 17:30:40 +0200	[thread overview]
Message-ID: <87sf1x8ztr.fsf@intel.com> (raw)
In-Reply-To: <Zb0QJGZ0RE-5KBQb@intel.com>

On Fri, 02 Feb 2024, Ville Syrjälä <ville.syrjala@linux.intel.com> wrote:
> On Fri, Feb 02, 2024 at 04:05:34PM +0200, Jani Nikula wrote:
>> If the sink supports 128b/132b and single-stream sideband messaging,
>> enable MST mode.
>> 
>> With this, the topology manager will still write DP_MSTM_CTRL, which
>> should be ignored by the sink. In the future,
>> drm_dp_mst_topology_mgr_set_mst() bool mst_state parameter should
>> probably be turned into an enum drm_dp_mst_mode mst_mode parameter.
>
> Rather I'd say the topology manager should stop concerning itself
> with the MST enable bit and just frob the sideband enable bit.
> The MST enable bit should be configured at modeset time to
> reflect whether we're about to transmit in MST or SST mode.

Are you suggesting the driver should write the MST vs. SST mode in
DP_MSTM_CTRL?

I worry a bit about the rmw on DPCD regs. The topology manager only does
writes.

BR,
Jani.





>
>> 
>> Cc: Arun R Murthy <arun.r.murthy@intel.com>
>> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
>> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
>> ---
>>  drivers/gpu/drm/i915/display/intel_dp.c | 4 +++-
>>  1 file changed, 3 insertions(+), 1 deletion(-)
>> 
>> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
>> index 4dd9c50226d1..16130e87dc23 100644
>> --- a/drivers/gpu/drm/i915/display/intel_dp.c
>> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
>> @@ -4020,7 +4020,9 @@ static bool intel_dp_mst_detect(struct intel_dp *intel_dp)
>>  
>>  	intel_dp->is_mst = i915->display.params.enable_dp_mst &&
>>  		intel_dp_mst_source_support(intel_dp) &&
>> -		sink_mst_mode == DP_MST_CAPABLE;
>> +		(sink_mst_mode == DP_MST_CAPABLE ||
>> +		 (sink_mst_mode == DP_MST_SIDEBAND_MSG &&
>> +		  intel_dp->dpcd[DP_MAIN_LINK_CHANNEL_CODING] & DP_CAP_ANSI_128B132B));
>>  
>>  	drm_dbg_kms(&i915->drm,
>>  		    "[ENCODER:%d:%s] MST support: port: %s, sink: %s, modparam: %s -> enable: %s\n",
>> -- 
>> 2.39.2

-- 
Jani Nikula, Intel

  reply	other threads:[~2024-02-12 15:31 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-02-02 14:05 [RFC 0/4] drm/i915/mst: enable MST mode for 128b/132b single-stream sideband Jani Nikula
2024-02-02 14:05 ` [RFC 1/4] drm/mst: read sideband messaging cap Jani Nikula
2024-02-02 15:46   ` Ville Syrjälä
2024-02-02 14:05 ` [RFC 2/4] drm/i915/dp: refactor DP MST detection and configuration Jani Nikula
2024-02-02 15:51   ` Ville Syrjälä
2024-02-12 15:25     ` Jani Nikula
2024-02-12 15:46       ` Ville Syrjälä
2024-02-02 14:05 ` [RFC 3/4] drm/i915/mst: improve debug logging of DP MST mode detect Jani Nikula
2024-02-02 14:05 ` [RFC 4/4] drm/i915/mst: enable MST mode for 128b/132b single-stream sideband Jani Nikula
2024-02-02 15:54   ` Ville Syrjälä
2024-02-12 15:30     ` Jani Nikula [this message]
2024-02-12 15:36       ` Ville Syrjälä
2024-02-05  9:07 ` ✗ Fi.CI.CHECKPATCH: warning for drm/i915/mst: enable MST mode for 128b/132b single-stream sideband (rev2) Patchwork
2024-02-05  9:07 ` ✗ Fi.CI.SPARSE: " Patchwork
2024-02-05  9:26 ` ✓ Fi.CI.BAT: success " Patchwork
2024-02-05 11:49 ` ✗ Fi.CI.IGT: failure " Patchwork

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