From: Jani Nikula <jani.nikula@linux.intel.com>
To: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH v7 01/11] drm/i915/perf: Drop wakeref on GuC RC error
Date: Tue, 21 Mar 2023 11:59:33 +0200 [thread overview]
Message-ID: <87sfdy8lx6.fsf@intel.com> (raw)
In-Reply-To: <ZBiy8icI4foN5Eo7@orsosgc001.jf.intel.com>
On Mon, 20 Mar 2023, Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com> wrote:
> On Mon, Mar 20, 2023 at 12:16:17PM +0200, Jani Nikula wrote:
>>On Fri, 17 Mar 2023, Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com> wrote:
>>> From: Chris Wilson <chris.p.wilson@linux.intel.com>
>>>
>>> If we fail to adjust the GuC run-control on opening the perf stream,
>>> make sure we unwind the wakeref just taken.
>>>
>>> v2: Retain old goto label names (Ashutosh)
>>>
>>> Fixes: 01e742746785 ("drm/i915/guc: Support OA when Wa_16011777198 is enabled")
>>> Signed-off-by: Chris Wilson <chris.p.wilson@linux.intel.com>
>>> Reviewed-by: Ashutosh Dixit <ashutosh.dixit@intel.com>
>>> ---
>>> drivers/gpu/drm/i915/i915_perf.c | 14 +++++++++-----
>>> drivers/gpu/drm/i915/i915_perf_types.h | 6 ++++++
>>> 2 files changed, 15 insertions(+), 5 deletions(-)
>>>
>>> diff --git a/drivers/gpu/drm/i915/i915_perf.c b/drivers/gpu/drm/i915/i915_perf.c
>>> index 824a34ec0b83..283a4a3c6862 100644
>>> --- a/drivers/gpu/drm/i915/i915_perf.c
>>> +++ b/drivers/gpu/drm/i915/i915_perf.c
>>> @@ -1592,9 +1592,7 @@ static void i915_oa_stream_destroy(struct i915_perf_stream *stream)
>>> /*
>>> * Wa_16011777198:dg2: Unset the override of GUCRC mode to enable rc6.
>>> */
>>> - if (intel_uc_uses_guc_rc(>->uc) &&
>>> - (IS_DG2_GRAPHICS_STEP(gt->i915, G10, STEP_A0, STEP_C0) ||
>>> - IS_DG2_GRAPHICS_STEP(gt->i915, G11, STEP_A0, STEP_B0)))
>>> + if (stream->override_gucrc)
>>> drm_WARN_ON(>->i915->drm,
>>> intel_guc_slpc_unset_gucrc_mode(>->uc.guc.slpc));
>>>
>>> @@ -3305,8 +3303,10 @@ static int i915_oa_stream_init(struct i915_perf_stream *stream,
>>> if (ret) {
>>> drm_dbg(&stream->perf->i915->drm,
>>> "Unable to override gucrc mode\n");
>>> - goto err_config;
>>> + goto err_gucrc;
>>> }
>>> +
>>> + stream->override_gucrc = true;
>>> }
>>>
>>> ret = alloc_oa_buffer(stream);
>>> @@ -3345,11 +3345,15 @@ static int i915_oa_stream_init(struct i915_perf_stream *stream,
>>> free_oa_buffer(stream);
>>>
>>> err_oa_buf_alloc:
>>> - free_oa_configs(stream);
>>> + if (stream->override_gucrc)
>>> + intel_guc_slpc_unset_gucrc_mode(>->uc.guc.slpc);
>>>
>>> +err_gucrc:
>>> intel_uncore_forcewake_put(stream->uncore, FORCEWAKE_ALL);
>>> intel_engine_pm_put(stream->engine);
>>>
>>> + free_oa_configs(stream);
>>> +
>>> err_config:
>>> free_noa_wait(stream);
>>>
>>> diff --git a/drivers/gpu/drm/i915/i915_perf_types.h b/drivers/gpu/drm/i915/i915_perf_types.h
>>> index ca150b7af3f2..e36f046fe2b6 100644
>>> --- a/drivers/gpu/drm/i915/i915_perf_types.h
>>> +++ b/drivers/gpu/drm/i915/i915_perf_types.h
>>> @@ -316,6 +316,12 @@ struct i915_perf_stream {
>>> * buffer should be checked for available data.
>>> */
>>> u64 poll_oa_period;
>>> +
>>> + /**
>>> + * @override_gucrc: GuC RC has been overridden for the perf stream,
>>> + * and we need to restore the default configuration on release.
>>> + */
>>> + bool override_gucrc:1;
>>
>>What do you gain by making this a bitfield? It's already a big struct,
>>and there already are other bool flags.
>
> Noticed it now. I guess this is not portable as it's compiler dependent.
> I would just remove the bitfield. I do see a few occurrences of bitfield
> bools in i915 though, so any specific guidelines on when to use bool vs
> bitfields?
Use it when you really need the space saving, but don't mind the added
cost for accessing the bit. And then you do need to pay attention to how
the struct members are added to not do silly padding.
The VBT code uses bitfields for parsing the binary data, it's
implementation dependent behaviour but it works for us. Need to be
mindful about it.
BR,
Jani.
>
> Thanks,
> Umesh
>>
>>BR,
>>Jani.
>>
>>
>>
>>> };
>>>
>>> /**
>>
>>--
>>Jani Nikula, Intel Open Source Graphics Center
--
Jani Nikula, Intel Open Source Graphics Center
next prev parent reply other threads:[~2023-03-21 9:59 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-03-17 23:16 [Intel-gfx] [PATCH v7 00/11] Add OAM support for MTL Umesh Nerlige Ramappa
2023-03-17 23:16 ` [Intel-gfx] [PATCH v7 01/11] drm/i915/perf: Drop wakeref on GuC RC error Umesh Nerlige Ramappa
2023-03-20 10:16 ` Jani Nikula
2023-03-20 19:24 ` Umesh Nerlige Ramappa
2023-03-21 9:59 ` Jani Nikula [this message]
2023-03-17 23:16 ` [Intel-gfx] [PATCH v7 02/11] drm/i915/mtl: Synchronize i915/BIOS on C6 enabling Umesh Nerlige Ramappa
2023-03-17 23:16 ` [Intel-gfx] [PATCH v7 03/11] drm/i915/perf: Validate OA sseu config outside switch Umesh Nerlige Ramappa
2023-03-17 23:16 ` [Intel-gfx] [PATCH v7 04/11] drm/i915/perf: Group engines into respective OA groups Umesh Nerlige Ramappa
2023-03-17 23:16 ` [Intel-gfx] [PATCH v7 05/11] drm/i915/perf: Fail modprobe if i915_perf_init fails on OOM Umesh Nerlige Ramappa
2023-03-17 23:16 ` [Intel-gfx] [PATCH v7 06/11] drm/i915/perf: Parse 64bit report header formats correctly Umesh Nerlige Ramappa
2023-03-17 23:16 ` [Intel-gfx] [PATCH v7 07/11] drm/i915/perf: Handle non-power-of-2 reports Umesh Nerlige Ramappa
2023-03-17 23:16 ` [Intel-gfx] [PATCH v7 08/11] drm/i915/perf: Add engine class instance parameters to perf Umesh Nerlige Ramappa
2023-03-17 23:16 ` [Intel-gfx] [PATCH v7 09/11] drm/i915/perf: Add support for OA media units Umesh Nerlige Ramappa
2023-03-20 2:06 ` Dixit, Ashutosh
2023-03-17 23:16 ` [Intel-gfx] [PATCH v7 10/11] drm/i915/perf: Pass i915 object to perf revision helper Umesh Nerlige Ramappa
2023-03-17 23:16 ` [Intel-gfx] [PATCH v7 11/11] drm/i915/perf: Wa_14017512683: Disable OAM if media C6 is enabled in BIOS Umesh Nerlige Ramappa
2023-03-20 3:56 ` Dixit, Ashutosh
2023-03-21 0:27 ` Umesh Nerlige Ramappa
2023-03-21 0:30 ` Dixit, Ashutosh
2023-03-18 0:10 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Add OAM support for MTL Patchwork
2023-03-18 0:10 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2023-03-18 0:10 ` [Intel-gfx] ✗ Fi.CI.DOCS: " Patchwork
2023-03-18 0:27 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2023-03-18 1:35 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=87sfdy8lx6.fsf@intel.com \
--to=jani.nikula@linux.intel.com \
--cc=intel-gfx@lists.freedesktop.org \
--cc=umesh.nerlige.ramappa@intel.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox