From: Jani Nikula <jani.nikula@linux.intel.com>
To: Patchwork <patchwork@emeril.freedesktop.org>,
Ayaz A Siddiqui <ayaz.siddiqui@intel.com>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/gt: Initialize unused MOCS entries to L3_WB
Date: Fri, 13 Aug 2021 10:54:59 +0300 [thread overview]
Message-ID: <87sfzdlqy4.fsf@intel.com> (raw)
In-Reply-To: <162876217249.21763.7891104765823416043@emeril.freedesktop.org>
These are all valid warnings, please fix.
BR,
Jani,
On Thu, 12 Aug 2021, Patchwork <patchwork@emeril.freedesktop.org> wrote:
> == Series Details ==
>
> Series: drm/i915/gt: Initialize unused MOCS entries to L3_WB
> URL : https://patchwork.freedesktop.org/series/93626/
> State : warning
>
> == Summary ==
>
> $ dim checkpatch origin/drm-tip
> ea863ae02268 drm/i915/gt: Add support of mocs propagation
> -:55: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
> #55: FILE: drivers/gpu/drm/i915/gt/intel_mocs.c:511:
> +static void set_mocs_index(struct intel_gt *gt,
> + struct drm_i915_mocs_table *table)
>
> total: 0 errors, 0 warnings, 1 checks, 44 lines checked
> ee1214c8eb4d drm/i915/gt: Use cmd_cctl override for platforms >= gen12
> -:85: ERROR:CODE_INDENT: code indent should use tabs where possible
> #85: FILE: drivers/gpu/drm/i915/gt/intel_mocs.c:394:
> +^I "Platform that should have UC index defined and does not\n")) {$
>
> -:189: CHECK:UNNECESSARY_PARENTHESES: Unnecessary parentheses around 'masked_value != expect'
> #189: FILE: drivers/gpu/drm/i915/gt/selftest_mocs.c:185:
> + if (!r->skip_check && (masked_value != expect)) {
>
> total: 1 errors, 0 warnings, 1 checks, 235 lines checked
> fd32a98d8b4f drm/i915/gt: Set BLIT_CCTL reg to un-cached
> -:61: CHECK:MACRO_ARG_PRECEDENCE: Macro argument 'dst' may be better as '(dst)' to avoid precedence issues
> #61: FILE: drivers/gpu/drm/i915/i915_reg.h:2574:
> +#define BLIT_CCTL_MOCS(dst, src) \
> + (((dst << 1) << BLIT_CCTL_DST_MOCS_SHIFT) | (src << 1))
>
> -:61: CHECK:MACRO_ARG_PRECEDENCE: Macro argument 'src' may be better as '(src)' to avoid precedence issues
> #61: FILE: drivers/gpu/drm/i915/i915_reg.h:2574:
> +#define BLIT_CCTL_MOCS(dst, src) \
> + (((dst << 1) << BLIT_CCTL_DST_MOCS_SHIFT) | (src << 1))
>
> total: 0 errors, 0 warnings, 2 checks, 38 lines checked
> 702829c25d98 drm/i915/gt: Initialize unused MOCS entries with device specific values
> 4f3306739a7e drm/i95/adl: Define MOCS table for Alderlake
> -:22: CHECK:LINE_SPACING: Please use a blank line after function/struct/union/enum declarations
> #22: FILE: drivers/gpu/drm/i915/gt/intel_mocs.c:325:
> };
> +static const struct drm_i915_mocs_entry adl_mocs_table[] = {
>
> -:25: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
> #25: FILE: drivers/gpu/drm/i915/gt/intel_mocs.c:328:
> + MOCS_ENTRY(0,
> + LE_3_WB | LE_TC_1_LLC | LE_LRUM(3),
>
> -:31: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
> #31: FILE: drivers/gpu/drm/i915/gt/intel_mocs.c:334:
> + MOCS_ENTRY(48,
> + LE_3_WB | LE_TC_1_LLC | LE_LRUM(3),
>
> -:35: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
> #35: FILE: drivers/gpu/drm/i915/gt/intel_mocs.c:338:
> + MOCS_ENTRY(49,
> + LE_1_UC | LE_TC_1_LLC,
>
> -:39: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
> #39: FILE: drivers/gpu/drm/i915/gt/intel_mocs.c:342:
> + MOCS_ENTRY(50,
> + LE_3_WB | LE_TC_1_LLC | LE_LRUM(3),
>
> -:43: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
> #43: FILE: drivers/gpu/drm/i915/gt/intel_mocs.c:346:
> + MOCS_ENTRY(51,
> + LE_1_UC | LE_TC_1_LLC,
>
> -:47: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
> #47: FILE: drivers/gpu/drm/i915/gt/intel_mocs.c:350:
> + MOCS_ENTRY(60,
> + LE_3_WB | LE_TC_1_LLC | LE_LRUM(3),
>
> -:51: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
> #51: FILE: drivers/gpu/drm/i915/gt/intel_mocs.c:354:
> + MOCS_ENTRY(61,
> + LE_1_UC | LE_TC_1_LLC,
>
> total: 0 errors, 0 warnings, 8 checks, 52 lines checked
>
>
--
Jani Nikula, Intel Open Source Graphics Center
next prev parent reply other threads:[~2021-08-13 7:55 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-08-12 6:47 [Intel-gfx] [PATCH 0/5] drm/i915/gt: Initialize unused MOCS entries to L3_WB Ayaz A Siddiqui
2021-08-12 6:47 ` [Intel-gfx] [PATCH 1/5] drm/i915/gt: Add support of mocs propagation Ayaz A Siddiqui
2021-08-12 6:47 ` [Intel-gfx] [PATCH 2/5] drm/i915/gt: Use cmd_cctl override for platforms >= gen12 Ayaz A Siddiqui
2021-08-13 7:53 ` Jani Nikula
2021-08-12 6:47 ` [Intel-gfx] [PATCH 3/5] drm/i915/gt: Set BLIT_CCTL reg to un-cached Ayaz A Siddiqui
2021-08-12 6:47 ` [Intel-gfx] [PATCH 4/5] drm/i915/gt: Initialize unused MOCS entries with device specific values Ayaz A Siddiqui
2021-08-12 6:47 ` [Intel-gfx] [PATCH 5/5] drm/i95/adl: Define MOCS table for Alderlake Ayaz A Siddiqui
2021-08-12 9:56 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/gt: Initialize unused MOCS entries to L3_WB Patchwork
2021-08-13 7:54 ` Jani Nikula [this message]
2021-08-18 9:50 ` Siddiqui, Ayaz A
2021-08-12 9:57 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2021-08-12 10:28 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
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