public inbox for intel-gfx@lists.freedesktop.org
 help / color / mirror / Atom feed
From: Jani Nikula <jani.nikula@linux.intel.com>
To: Ville Syrjala <ville.syrjala@linux.intel.com>,
	intel-gfx@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH 00/17] drm/i915/fbc: Prep work for multiple FBC instances
Date: Fri, 05 Nov 2021 15:08:37 +0200	[thread overview]
Message-ID: <87v91692cq.fsf@intel.com> (raw)
In-Reply-To: <20211104144520.22605-1-ville.syrjala@linux.intel.com>

On Thu, 04 Nov 2021, Ville Syrjala <ville.syrjala@linux.intel.com> wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> Bunch of refactoring and cleanups, mainly as prep work
> for introducing multiple FBC instances in the future.

Eyeballed through the series, and I like all of it. Really nice.

Acked-by: Jani Nikula <jani.nikula@intel.com>

>
> Ville Syrjälä (17):
>   drm/i915/fbc: Exract snb_fbc_program_fence()
>   drm/i915/fbc: Extract {skl,glk}_fbc_program_cfb_stride()
>   drm/i915/fbc: Just use params->fence_y_offset always
>   drm/i915/fbc: Introduce intel_fbc_is_compressing()
>   drm/i915/fbc: Extract helpers to compute FBC control register values
>   drm/i915/fbc: Introduce intel_fbc_funcs
>   drm/i915/fbc: Introduce .nuke() vfunc
>   drm/i915/fbc: s/gen7/ivb/
>   drm/i915/fbc: Introduce .program_cfb() vfunc
>   drm/i915/fbc: Introduce intel_fbc_set_false_color()
>   drm/i915/fbc: Nuke BDW_FBC_COMP_SEG_MASK
>   drm/i915/fbc: Clean up all register defines
>   drm/i915/fbc: Finish polishing FBC1 registers
>   drm/i915: Relocate FBC_LLC_READ_CTRL
>   drm/i915/fbc: s/dev_priv/i915/
>   drm/i915/fbc: Start passing around intel_fbc
>   drm/1915/fbc: Replace plane->has_fbc with a pointer to the fbc
>     instance
>
>  drivers/gpu/drm/i915/display/i9xx_plane.c     |  10 +-
>  drivers/gpu/drm/i915/display/intel_display.c  |   4 +-
>  .../drm/i915/display/intel_display_debugfs.c  |  43 +-
>  .../drm/i915/display/intel_display_types.h    |   4 +-
>  drivers/gpu/drm/i915/display/intel_fbc.c      | 996 ++++++++++--------
>  drivers/gpu/drm/i915/display/intel_fbc.h      |  11 +-
>  .../drm/i915/display/intel_fifo_underrun.c    |   2 +-
>  .../drm/i915/display/skl_universal_plane.c    |  10 +-
>  drivers/gpu/drm/i915/i915_drv.h               |   4 +
>  drivers/gpu/drm/i915/i915_reg.h               | 154 +--
>  drivers/gpu/drm/i915/intel_pm.c               |  16 +-
>  11 files changed, 695 insertions(+), 559 deletions(-)

-- 
Jani Nikula, Intel Open Source Graphics Center

  parent reply	other threads:[~2021-11-05 13:08 UTC|newest]

Thread overview: 25+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-11-04 14:45 [Intel-gfx] [PATCH 00/17] drm/i915/fbc: Prep work for multiple FBC instances Ville Syrjala
2021-11-04 14:45 ` [Intel-gfx] [PATCH 01/17] drm/i915/fbc: Exract snb_fbc_program_fence() Ville Syrjala
2021-11-04 14:45 ` [Intel-gfx] [PATCH 02/17] drm/i915/fbc: Extract {skl, glk}_fbc_program_cfb_stride() Ville Syrjala
2021-11-04 14:45 ` [Intel-gfx] [PATCH 03/17] drm/i915/fbc: Just use params->fence_y_offset always Ville Syrjala
2021-11-04 14:45 ` [Intel-gfx] [PATCH 04/17] drm/i915/fbc: Introduce intel_fbc_is_compressing() Ville Syrjala
2021-11-04 14:45 ` [Intel-gfx] [PATCH 05/17] drm/i915/fbc: Extract helpers to compute FBC control register values Ville Syrjala
2021-11-04 14:45 ` [Intel-gfx] [PATCH 06/17] drm/i915/fbc: Introduce intel_fbc_funcs Ville Syrjala
2021-11-04 14:45 ` [Intel-gfx] [PATCH 07/17] drm/i915/fbc: Introduce .nuke() vfunc Ville Syrjala
2021-11-04 14:45 ` [Intel-gfx] [PATCH 08/17] drm/i915/fbc: s/gen7/ivb/ Ville Syrjala
2021-11-04 14:45 ` [Intel-gfx] [PATCH 09/17] drm/i915/fbc: Introduce .program_cfb() vfunc Ville Syrjala
2021-11-12 11:11   ` Jani Nikula
2021-11-04 14:45 ` [Intel-gfx] [PATCH 10/17] drm/i915/fbc: Introduce intel_fbc_set_false_color() Ville Syrjala
2021-11-04 14:45 ` [Intel-gfx] [PATCH 11/17] drm/i915/fbc: Nuke BDW_FBC_COMP_SEG_MASK Ville Syrjala
2021-11-04 14:45 ` [Intel-gfx] [PATCH 12/17] drm/i915/fbc: Clean up all register defines Ville Syrjala
2021-11-04 14:45 ` [Intel-gfx] [PATCH 13/17] drm/i915/fbc: Finish polishing FBC1 registers Ville Syrjala
2021-11-04 14:45 ` [Intel-gfx] [PATCH 14/17] drm/i915: Relocate FBC_LLC_READ_CTRL Ville Syrjala
2021-11-04 14:45 ` [Intel-gfx] [PATCH 15/17] drm/i915/fbc: s/dev_priv/i915/ Ville Syrjala
2021-11-04 14:45 ` [Intel-gfx] [PATCH 16/17] drm/i915/fbc: Start passing around intel_fbc Ville Syrjala
2021-11-04 14:45 ` [Intel-gfx] [PATCH 17/17] drm/1915/fbc: Replace plane->has_fbc with a pointer to the fbc instance Ville Syrjala
2021-11-04 18:47 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/fbc: Prep work for multiple FBC instances Patchwork
2021-11-04 18:52 ` [Intel-gfx] ✗ Fi.CI.DOCS: " Patchwork
2021-11-04 19:17 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2021-11-04 22:41 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
2021-11-05 13:08 ` Jani Nikula [this message]
2021-11-11 12:28   ` [Intel-gfx] [PATCH 00/17] " Kahola, Mika

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=87v91692cq.fsf@intel.com \
    --to=jani.nikula@linux.intel.com \
    --cc=intel-gfx@lists.freedesktop.org \
    --cc=ville.syrjala@linux.intel.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox