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From: Jani Nikula <jani.nikula@linux.intel.com>
To: Mitul Golani <mitulkumar.ajitkumar.golani@intel.com>,
	intel-gfx@lists.freedesktop.org,
	Maxime Ripard <mripard@kernel.org>,
	Thomas Zimmermann <tzimmermann@suse.de>,
	Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Cc: dri-devel@lists.freedesktop.org
Subject: Re: [PATCH v13 5/9] drm/dp: Add refresh rate divider to struct representing AS SDP
Date: Thu, 06 Jun 2024 14:38:45 +0300	[thread overview]
Message-ID: <87wmn29u7u.fsf@intel.com> (raw)
In-Reply-To: <20240605170111.494784-6-mitulkumar.ajitkumar.golani@intel.com>

On Wed, 05 Jun 2024, Mitul Golani <mitulkumar.ajitkumar.golani@intel.com> wrote:
> Add target_rr_divider to structure representing AS SDP.
> It is valid only in FAVT mode, sink device ignores the bit in AVT
> mode.
>
> --v2:
> - Update commit header and send patch to dri-devel.
>
> Signed-off-by: Mitul Golani <mitulkumar.ajitkumar.golani@intel.com>
> Reviewed-by: Arun R Murthy <arun.r.murthy@intel.com>

Maxime, Maarten, Thomas, ack for merging this via drm-intel-next?

BR,
Jani.

> ---
>  include/drm/display/drm_dp_helper.h | 1 +
>  1 file changed, 1 insertion(+)
>
> diff --git a/include/drm/display/drm_dp_helper.h b/include/drm/display/drm_dp_helper.h
> index 8defcc399f42..ea03e1dd26ba 100644
> --- a/include/drm/display/drm_dp_helper.h
> +++ b/include/drm/display/drm_dp_helper.h
> @@ -122,6 +122,7 @@ struct drm_dp_as_sdp {
>  	int target_rr;
>  	int duration_incr_ms;
>  	int duration_decr_ms;
> +	bool target_rr_divider;
>  	enum operation_mode mode;
>  };

-- 
Jani Nikula, Intel

  reply	other threads:[~2024-06-06 11:38 UTC|newest]

Thread overview: 25+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-06-05 17:01 [PATCH v13 0/9] Implement CMRR Support Mitul Golani
2024-06-05 17:01 ` [PATCH v13 1/9] gpu/drm/i915: Update indentation for VRR registers and bits Mitul Golani
2024-06-07  3:29   ` Nautiyal, Ankit K
2024-06-07  5:08     ` Nautiyal, Ankit K
2024-06-07 10:15   ` [PATCH v14 " Mitul Golani
2024-06-05 17:01 ` [PATCH v13 2/9] drm/i915: Separate VRR related register definitions Mitul Golani
2024-06-07 10:17   ` [PATCH v14 " Mitul Golani
2024-06-05 17:01 ` [PATCH v13 3/9] drm/i915: Define and compute Transcoder CMRR registers Mitul Golani
2024-06-05 17:01 ` [PATCH v13 4/9] drm/i915: Update trans_vrr_ctl flag when cmrr is computed Mitul Golani
2024-06-05 17:01 ` [PATCH v13 5/9] drm/dp: Add refresh rate divider to struct representing AS SDP Mitul Golani
2024-06-06 11:38   ` Jani Nikula [this message]
2024-06-06 12:23     ` Maxime Ripard
2024-06-05 17:01 ` [PATCH v13 6/9] drm/i915/display: Add support for pack and unpack Mitul Golani
2024-06-05 17:01 ` [PATCH v13 7/9] drm/i915/display: Compute Adaptive sync SDP params Mitul Golani
2024-06-05 17:01 ` [PATCH v13 8/9] drm/i915/display: Compute vrr vsync params Mitul Golani
2024-06-05 17:01 ` [PATCH v13 9/9] drm/i915: Compute CMRR and calculate vtotal Mitul Golani
2024-06-05 17:58 ` ✗ Fi.CI.CHECKPATCH: warning for Implement CMRR Support (rev13) Patchwork
2024-06-05 17:58 ` ✗ Fi.CI.SPARSE: " Patchwork
2024-06-05 18:06 ` ✓ Fi.CI.BAT: success " Patchwork
2024-06-05 23:57 ` ✗ Fi.CI.IGT: failure " Patchwork
2024-06-06 12:43 ` ✓ Fi.CI.IGT: success " Patchwork
2024-06-07 11:38 ` ✗ Fi.CI.CHECKPATCH: warning for Implement CMRR Support (rev15) Patchwork
2024-06-07 11:38 ` ✗ Fi.CI.SPARSE: " Patchwork
2024-06-07 11:48 ` ✓ Fi.CI.BAT: success " Patchwork
2024-06-07 22:07 ` ✗ Fi.CI.IGT: failure " Patchwork

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