Re: [Intel-gfx] [PATCH v2 1/2] drm/i915/tgl: Fix REVID macros for TGL to fetch correct stepping

[Jani Nikula <jani.nikula@intel.com>]

On Fri, 18 Dec 2020, Lucas De Marchi <lucas.demarchi@intel.com> wrote:
> On Fri, Dec 18, 2020 at 01:13:49PM +0200, Jani Nikula wrote:
>>On Fri, 18 Dec 2020, Jani Nikula <jani.nikula@intel.com> wrote:
>>> On Thu, 17 Dec 2020, Lucas De Marchi <lucas.demarchi@intel.com> wrote:
>>>> Both patches applied. Thanks!
>>>>
>>>> Jani, maybe now you can rebase your patch to get rid of the extern ?
>>>
>>> Yes, thanks for the irq so I can stop polling. ;)
>>
>>Huh, why were these applied to drm-intel-gt-next? It's much more about
>>driver core code than gt.
>
> sigh... by mistake. At the time as was mainly thinking about the WAs
> that are affected by these and thought it would belong to gt.
>
> what now? Do we apply in to drm-intel-next as well or wait for a backmerge?

Maybe I'll do the refactoring in gt-next as well. Or wait for the
backmerge. *shrug*

Don't worry about it.

BR,
Jani.


>
> sorry,
>
> Lucas De Marchi
>
>>
>>BR,
>>Jani.
>>
>>
>>>
>>> BR,
>>> Jani.
>>>
>>>
>>>>
>>>>
>>>> Lucas De Marchi
>>>>
>>>> On Wed, Dec 02, 2020 at 11:23:58PM -0800, Aditya Swarup wrote:
>>>>>Fix TGL REVID macros to fetch correct display/gt stepping based
>>>>>on SOC rev id from INTEL_REVID() macro. Previously, we were just
>>>>>returning the first element of the revid array instead of using
>>>>>the correct index based on SOC rev id.
>>>>>
>>>>>Fixes: ("drm/i915/tgl: Fix stepping WA matching")
>>>>>Cc: José Roberto de Souza <jose.souza@intel.com>
>>>>>Cc: Matt Roper <matthew.d.roper@intel.com>
>>>>>Cc: Lucas De Marchi <lucas.demarchi@intel.com>
>>>>>Cc: Jani Nikula <jani.nikula@intel.com>
>>>>>Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
>>>>>Signed-off-by: Aditya Swarup <aditya.swarup@intel.com>
>>>>>Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>
>>>>>---
>>>>> drivers/gpu/drm/i915/i915_drv.h | 12 ++++++------
>>>>> 1 file changed, 6 insertions(+), 6 deletions(-)
>>>>>
>>>>>diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
>>>>>index fc1090c6889c..2e2149c9a2f4 100644
>>>>>--- a/drivers/gpu/drm/i915/i915_drv.h
>>>>>+++ b/drivers/gpu/drm/i915/i915_drv.h
>>>>>@@ -1580,9 +1580,9 @@ static inline const struct i915_rev_steppings *
>>>>> tgl_revids_get(struct drm_i915_private *dev_priv)
>>>>> {
>>>>> 	if (IS_TGL_U(dev_priv) || IS_TGL_Y(dev_priv))
>>>>>-		return tgl_uy_revids;
>>>>>+		return &tgl_uy_revids[INTEL_REVID(dev_priv)];
>>>>> 	else
>>>>>-		return tgl_revids;
>>>>>+		return &tgl_revids[INTEL_REVID(dev_priv)];
>>>>> }
>>>>>
>>>>> #define IS_TGL_DISP_REVID(p, since, until) \
>>>>>@@ -1592,14 +1592,14 @@ tgl_revids_get(struct drm_i915_private *dev_priv)
>>>>>
>>>>> #define IS_TGL_UY_GT_REVID(p, since, until) \
>>>>> 	((IS_TGL_U(p) || IS_TGL_Y(p)) && \
>>>>>-	 tgl_uy_revids->gt_stepping >= (since) && \
>>>>>-	 tgl_uy_revids->gt_stepping <= (until))
>>>>>+	 tgl_uy_revids[INTEL_REVID(p)].gt_stepping >= (since) && \
>>>>>+	 tgl_uy_revids[INTEL_REVID(p)].gt_stepping <= (until))
>>>>>
>>>>> #define IS_TGL_GT_REVID(p, since, until) \
>>>>> 	(IS_TIGERLAKE(p) && \
>>>>> 	 !(IS_TGL_U(p) || IS_TGL_Y(p)) && \
>>>>>-	 tgl_revids->gt_stepping >= (since) && \
>>>>>-	 tgl_revids->gt_stepping <= (until))
>>>>>+	 tgl_revids[INTEL_REVID(p)].gt_stepping >= (since) && \
>>>>>+	 tgl_revids[INTEL_REVID(p)].gt_stepping <= (until))
>>>>>
>>>>> #define RKL_REVID_A0		0x0
>>>>> #define RKL_REVID_B0		0x1
>>>>>--
>>>>>2.27.0
>>>>>
>>>>>_______________________________________________
>>>>>Intel-gfx mailing list
>>>>>Intel-gfx@lists.freedesktop.org
>>>>>https://lists.freedesktop.org/mailman/listinfo/intel-gfx
>>
>>-- 
>>Jani Nikula, Intel Open Source Graphics Center

-- 
Jani Nikula, Intel Open Source Graphics Center
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx