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From: Jani Nikula <jani.nikula@intel.com>
To: Anshuman Gupta <anshuman.gupta@intel.com>,
	intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH v2 02/10] i915:Added DC3CO mask to allowed_dc_mask and gen9_dc_mask.
Date: Mon, 29 Jul 2019 15:41:51 +0300	[thread overview]
Message-ID: <87wog1nhbk.fsf@intel.com> (raw)
In-Reply-To: <20190717102804.27202-3-anshuman.gupta@intel.com>


In the subject, please use "drm/i915:" as the prefix. Please add a space
after ":".

Please use the imperative style, i.e. "add" instead of "added".

On Wed, 17 Jul 2019, Anshuman Gupta <anshuman.gupta@intel.com> wrote:
> This patch enables dc3co state in enable_dc module param
> and adds dc3co enable mask to allowed_dc_mask and gen9_dc_mask.

Please don't reference "this patch". We know what you're referencing,
and it'll also no longer be a patch once it's committed. Please just use
the imperative style, "Enable dc3co state...".

BR,
Jani.


>
> Cc: jani.nikula@intel.com
> Cc: imre.deak@intel.com
> Cc: animesh.manna@intel.com

Would be preferrable to include names here as well, for example

Cc: Jani Nikula <jani.nikula@intel.com>


Same things for all patches here.

BR,
Jani.

> Signed-off-by: Anshuman Gupta <anshuman.gupta@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_display_power.c | 13 +++++++++++--
>  drivers/gpu/drm/i915/i915_params.c                 |  3 ++-
>  2 files changed, 13 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display_power.c b/drivers/gpu/drm/i915/display/intel_display_power.c
> index f040a74349df..0dec4d01877f 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_power.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_power.c
> @@ -714,6 +714,10 @@ static u32 gen9_dc_mask(struct drm_i915_private *dev_priv)
>  	u32 mask;
>  
>  	mask = DC_STATE_EN_UPTO_DC5;
> +
> +	if (INTEL_GEN(dev_priv) == 12)
> +		mask |= DC_STATE_EN_DC3CO | DC_STATE_EN_UPTO_DC6
> +					  | DC_STATE_EN_DC9;
>  	if (INTEL_GEN(dev_priv) >= 11)
>  		mask |= DC_STATE_EN_UPTO_DC6 | DC_STATE_EN_DC9;
>  	else if (IS_GEN9_LP(dev_priv))
> @@ -3943,7 +3947,10 @@ static u32 get_allowed_dc_mask(const struct drm_i915_private *dev_priv,
>  	int requested_dc;
>  	int max_dc;
>  
> -	if (INTEL_GEN(dev_priv) >= 11) {
> +	if (INTEL_GEN(dev_priv) == 12) {
> +		max_dc = 3;
> +		mask = DC_STATE_EN_DC9;
> +	} else if (INTEL_GEN(dev_priv) >= 11) {
>  		max_dc = 2;
>  		/*
>  		 * DC9 has a separate HW flow from the rest of the DC states,
> @@ -3969,7 +3976,7 @@ static u32 get_allowed_dc_mask(const struct drm_i915_private *dev_priv,
>  		requested_dc = enable_dc;
>  	} else if (enable_dc == -1) {
>  		requested_dc = max_dc;
> -	} else if (enable_dc > max_dc && enable_dc <= 2) {
> +	} else if (enable_dc > max_dc && enable_dc <= 3) {
>  		DRM_DEBUG_KMS("Adjusting requested max DC state (%d->%d)\n",
>  			      enable_dc, max_dc);
>  		requested_dc = max_dc;
> @@ -3978,6 +3985,8 @@ static u32 get_allowed_dc_mask(const struct drm_i915_private *dev_priv,
>  		requested_dc = max_dc;
>  	}
>  
> +	if (requested_dc > 2)
> +		mask |= DC_STATE_EN_DC3CO;
>  	if (requested_dc > 1)
>  		mask |= DC_STATE_EN_UPTO_DC6;
>  	if (requested_dc > 0)
> diff --git a/drivers/gpu/drm/i915/i915_params.c b/drivers/gpu/drm/i915/i915_params.c
> index 296452f9efe4..7a46dc957660 100644
> --- a/drivers/gpu/drm/i915/i915_params.c
> +++ b/drivers/gpu/drm/i915/i915_params.c
> @@ -46,7 +46,8 @@ i915_param_named(modeset, int, 0400,
>  
>  i915_param_named_unsafe(enable_dc, int, 0400,
>  	"Enable power-saving display C-states. "
> -	"(-1=auto [default]; 0=disable; 1=up to DC5; 2=up to DC6)");
> +	"(-1=auto [default]; 0=disable; 1=up to DC5; 2=up to DC6; "
> +	"3=up to DC6 with DC3CO)");
>  
>  i915_param_named_unsafe(enable_fbc, int, 0600,
>  	"Enable frame buffer compression for power savings "

-- 
Jani Nikula, Intel Open Source Graphics Center
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

  reply	other threads:[~2019-07-29 14:01 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-07-17 10:27 [PATCH v2 00/10] DC3CO Support for TGL Anshuman Gupta
2019-07-17 10:27 ` [PATCH v2 01/10] drm/i915/tgl:Added DC3CO required register and bits Anshuman Gupta
2019-07-17 10:27 ` [PATCH v2 02/10] i915:Added DC3CO mask to allowed_dc_mask and gen9_dc_mask Anshuman Gupta
2019-07-29 12:41   ` Jani Nikula [this message]
2019-07-17 10:27 ` [PATCH v2 03/10] i915:Added DC3CO power well Anshuman Gupta
2019-07-17 10:27 ` [PATCH v2 04/10] drm/i915/tgl:Added mutual exclusive handling for DC3CO and DC5/6 Anshuman Gupta
2019-07-17 10:28 ` [PATCH v2 05/10] drm/i915/tgl:Added helper function to prefer dc3co over dc5 Anshuman Gupta
2019-07-17 10:28 ` [PATCH v2 06/10] drm/i915/tgl:Added VIDEO power domain Anshuman Gupta
2019-07-17 10:28 ` [PATCH v2 07/10] drm/i915/tgl:DC3CO PSR2 helper Anshuman Gupta
2019-07-17 10:28 ` [PATCH v2 08/10] drm/i915/tgl:switch between dc3co and dc5 based on display idleness Anshuman Gupta
2019-07-17 10:28 ` [PATCH v2 09/10] drm/i915/tgl:Added DC3CO counter in i915_dmc_info Anshuman Gupta
  -- strict thread matches above, loose matches on Subject: below --
2019-07-17 14:09 [PATCH v2 00/10] DC3CO Support for TGL Anshuman Gupta
2019-07-17 14:09 ` [PATCH v2 02/10] i915:Added DC3CO mask to allowed_dc_mask and gen9_dc_mask Anshuman Gupta
2019-07-12 16:29 [PATCH v2 00/10] DC3CO Support for TGL Anshuman Gupta
2019-07-12 16:29 ` [PATCH v2 02/10] i915:Added DC3CO mask to allowed_dc_mask and gen9_dc_mask Anshuman Gupta

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