From: Mika Kuoppala <mika.kuoppala@linux.intel.com>
To: Chris Wilson <chris@chris-wilson.co.uk>, intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH 1/2] drm/i915/selftests: Refactor common flush_test()
Date: Tue, 08 May 2018 14:39:08 +0300 [thread overview]
Message-ID: <87wowewf4z.fsf@gaia.fi.intel.com> (raw)
In-Reply-To: <20180505091014.26126-1-chris@chris-wilson.co.uk>
Chris Wilson <chris@chris-wilson.co.uk> writes:
> Pull igt_flush_test() out into its own library before copying and
> pasting the code for a third time.
>
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
> ---
> drivers/gpu/drm/i915/Makefile | 3 +-
> .../gpu/drm/i915/selftests/igt_flush_test.c | 64 +++++++++++++++++
> .../gpu/drm/i915/selftests/igt_flush_test.h | 14 ++++
> .../gpu/drm/i915/selftests/intel_hangcheck.c | 66 ++----------------
> drivers/gpu/drm/i915/selftests/intel_lrc.c | 68 ++-----------------
> 5 files changed, 93 insertions(+), 122 deletions(-)
> create mode 100644 drivers/gpu/drm/i915/selftests/igt_flush_test.c
> create mode 100644 drivers/gpu/drm/i915/selftests/igt_flush_test.h
>
> diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile
> index 00c13382b008..4c6adae23e18 100644
> --- a/drivers/gpu/drm/i915/Makefile
> +++ b/drivers/gpu/drm/i915/Makefile
> @@ -158,7 +158,8 @@ i915-y += dvo_ch7017.o \
> i915-$(CONFIG_DRM_I915_CAPTURE_ERROR) += i915_gpu_error.o
> i915-$(CONFIG_DRM_I915_SELFTEST) += \
> selftests/i915_random.o \
> - selftests/i915_selftest.o
> + selftests/i915_selftest.o \
> + selftests/igt_flush_test.o
>
> # virtual gpu code
> i915-y += i915_vgpu.o
> diff --git a/drivers/gpu/drm/i915/selftests/igt_flush_test.c b/drivers/gpu/drm/i915/selftests/igt_flush_test.c
> new file mode 100644
> index 000000000000..abff2f04ea84
> --- /dev/null
> +++ b/drivers/gpu/drm/i915/selftests/igt_flush_test.c
> @@ -0,0 +1,64 @@
> +/*
> + * SPDX-License-Identifier: MIT
> + *
> + * Copyright © 2018 Intel Corporation
> + */
> +
> +#include "../i915_drv.h"
> +
> +#include "../i915_selftest.h"
> +#include "igt_flush_test.h"
> +
> +struct wedge_me {
> + struct delayed_work work;
> + struct drm_i915_private *i915;
> + const void *symbol;
> +};
> +
> +static void wedge_me(struct work_struct *work)
> +{
> + struct wedge_me *w = container_of(work, typeof(*w), work.work);
> +
> + pr_err("%pS timed out, cancelling all further testing.\n", w->symbol);
> +
> + GEM_TRACE("%pS timed out.\n", w->symbol);
> + GEM_TRACE_DUMP();
> +
> + i915_gem_set_wedged(w->i915);
> +}
> +
> +static void __init_wedge(struct wedge_me *w,
> + struct drm_i915_private *i915,
> + long timeout,
> + const void *symbol)
> +{
> + w->i915 = i915;
> + w->symbol = symbol;
> +
> + INIT_DELAYED_WORK_ONSTACK(&w->work, wedge_me);
> + schedule_delayed_work(&w->work, timeout);
> +}
> +
> +static void __fini_wedge(struct wedge_me *w)
> +{
> + cancel_delayed_work_sync(&w->work);
> + destroy_delayed_work_on_stack(&w->work);
> + w->i915 = NULL;
> +}
> +
> +#define wedge_on_timeout(W, DEV, TIMEOUT) \
> + for (__init_wedge((W), (DEV), (TIMEOUT), __builtin_return_address(0)); \
> + (W)->i915; \
> + __fini_wedge((W)))
> +
> +int igt_flush_test(struct drm_i915_private *i915, unsigned int flags)
> +{
> + struct wedge_me w;
> +
> + cond_resched();
> +
> + wedge_on_timeout(&w, i915, HZ)
> + i915_gem_wait_for_idle(i915, flags);
> +
> + return i915_terminally_wedged(&i915->gpu_error) ? -EIO : 0;
> +}
> diff --git a/drivers/gpu/drm/i915/selftests/igt_flush_test.h b/drivers/gpu/drm/i915/selftests/igt_flush_test.h
> new file mode 100644
> index 000000000000..63e009927c43
> --- /dev/null
> +++ b/drivers/gpu/drm/i915/selftests/igt_flush_test.h
> @@ -0,0 +1,14 @@
> +/*
> + * SPDX-License-Identifier: MIT
> + *
> + * Copyright © 2018 Intel Corporation
> + */
> +
> +#ifndef IGT_FLUSH_TEST_H
> +#define IGT_FLUSH_TEST_H
> +
> +struct drm_i915_private;
> +
> +int igt_flush_test(struct drm_i915_private *i915, unsigned int flags);
> +
> +#endif /* IGT_FLUSH_TEST_H */
> diff --git a/drivers/gpu/drm/i915/selftests/intel_hangcheck.c b/drivers/gpu/drm/i915/selftests/intel_hangcheck.c
> index c61bf65454a9..438e0b045a2c 100644
> --- a/drivers/gpu/drm/i915/selftests/intel_hangcheck.c
> +++ b/drivers/gpu/drm/i915/selftests/intel_hangcheck.c
> @@ -26,6 +26,7 @@
>
> #include "../i915_selftest.h"
> #include "i915_random.h"
> +#include "igt_flush_test.h"
>
> #include "mock_context.h"
> #include "mock_drm.h"
> @@ -253,61 +254,6 @@ static u32 hws_seqno(const struct hang *h, const struct i915_request *rq)
> return READ_ONCE(h->seqno[rq->fence.context % (PAGE_SIZE/sizeof(u32))]);
> }
>
> -struct wedge_me {
> - struct delayed_work work;
> - struct drm_i915_private *i915;
> - const void *symbol;
> -};
> -
> -static void wedge_me(struct work_struct *work)
> -{
> - struct wedge_me *w = container_of(work, typeof(*w), work.work);
> -
> - pr_err("%pS timed out, cancelling all further testing.\n", w->symbol);
> -
> - GEM_TRACE("%pS timed out.\n", w->symbol);
> - GEM_TRACE_DUMP();
> -
> - i915_gem_set_wedged(w->i915);
> -}
> -
> -static void __init_wedge(struct wedge_me *w,
> - struct drm_i915_private *i915,
> - long timeout,
> - const void *symbol)
> -{
> - w->i915 = i915;
> - w->symbol = symbol;
> -
> - INIT_DELAYED_WORK_ONSTACK(&w->work, wedge_me);
> - schedule_delayed_work(&w->work, timeout);
> -}
> -
> -static void __fini_wedge(struct wedge_me *w)
> -{
> - cancel_delayed_work_sync(&w->work);
> - destroy_delayed_work_on_stack(&w->work);
> - w->i915 = NULL;
> -}
> -
> -#define wedge_on_timeout(W, DEV, TIMEOUT) \
> - for (__init_wedge((W), (DEV), (TIMEOUT), __builtin_return_address(0)); \
> - (W)->i915; \
> - __fini_wedge((W)))
> -
> -static noinline int
> -flush_test(struct drm_i915_private *i915, unsigned int flags)
> -{
> - struct wedge_me w;
> -
> - cond_resched();
> -
> - wedge_on_timeout(&w, i915, HZ)
> - i915_gem_wait_for_idle(i915, flags);
> -
> - return i915_terminally_wedged(&i915->gpu_error) ? -EIO : 0;
> -}
> -
> static void hang_fini(struct hang *h)
> {
> *h->batch = MI_BATCH_BUFFER_END;
> @@ -321,7 +267,7 @@ static void hang_fini(struct hang *h)
>
> kernel_context_close(h->ctx);
>
> - flush_test(h->i915, I915_WAIT_LOCKED);
> + igt_flush_test(h->i915, I915_WAIT_LOCKED);
> }
>
> static bool wait_until_running(struct hang *h, struct i915_request *rq)
> @@ -575,7 +521,7 @@ static int __igt_reset_engine(struct drm_i915_private *i915, bool active)
> if (err)
> break;
>
> - err = flush_test(i915, 0);
> + err = igt_flush_test(i915, 0);
> if (err)
> break;
> }
> @@ -874,7 +820,7 @@ static int __igt_reset_engines(struct drm_i915_private *i915,
> if (err)
> break;
>
> - err = flush_test(i915, 0);
> + err = igt_flush_test(i915, 0);
> if (err)
> break;
> }
> @@ -1168,7 +1114,7 @@ static int igt_reset_queue(void *arg)
>
> i915_request_put(prev);
>
> - err = flush_test(i915, I915_WAIT_LOCKED);
> + err = igt_flush_test(i915, I915_WAIT_LOCKED);
> if (err)
> break;
> }
> @@ -1280,7 +1226,7 @@ int intel_hangcheck_live_selftests(struct drm_i915_private *i915)
> err = i915_subtests(tests, i915);
>
> mutex_lock(&i915->drm.struct_mutex);
> - flush_test(i915, I915_WAIT_LOCKED);
> + igt_flush_test(i915, I915_WAIT_LOCKED);
> mutex_unlock(&i915->drm.struct_mutex);
>
> i915_modparams.enable_hangcheck = saved_hangcheck;
> diff --git a/drivers/gpu/drm/i915/selftests/intel_lrc.c b/drivers/gpu/drm/i915/selftests/intel_lrc.c
> index b7460b5dd4f7..1b8a07125150 100644
> --- a/drivers/gpu/drm/i915/selftests/intel_lrc.c
> +++ b/drivers/gpu/drm/i915/selftests/intel_lrc.c
> @@ -5,6 +5,7 @@
> */
>
> #include "../i915_selftest.h"
> +#include "igt_flush_test.h"
>
> #include "mock_context.h"
>
> @@ -168,61 +169,6 @@ static u32 hws_seqno(const struct spinner *spin, const struct i915_request *rq)
> return READ_ONCE(*seqno);
> }
>
> -struct wedge_me {
> - struct delayed_work work;
> - struct drm_i915_private *i915;
> - const void *symbol;
> -};
> -
> -static void wedge_me(struct work_struct *work)
> -{
> - struct wedge_me *w = container_of(work, typeof(*w), work.work);
> -
> - pr_err("%pS timed out, cancelling all further testing.\n", w->symbol);
> -
> - GEM_TRACE("%pS timed out.\n", w->symbol);
> - GEM_TRACE_DUMP();
> -
> - i915_gem_set_wedged(w->i915);
> -}
> -
> -static void __init_wedge(struct wedge_me *w,
> - struct drm_i915_private *i915,
> - long timeout,
> - const void *symbol)
> -{
> - w->i915 = i915;
> - w->symbol = symbol;
> -
> - INIT_DELAYED_WORK_ONSTACK(&w->work, wedge_me);
> - schedule_delayed_work(&w->work, timeout);
> -}
> -
> -static void __fini_wedge(struct wedge_me *w)
> -{
> - cancel_delayed_work_sync(&w->work);
> - destroy_delayed_work_on_stack(&w->work);
> - w->i915 = NULL;
> -}
> -
> -#define wedge_on_timeout(W, DEV, TIMEOUT) \
> - for (__init_wedge((W), (DEV), (TIMEOUT), __builtin_return_address(0)); \
> - (W)->i915; \
> - __fini_wedge((W)))
> -
> -static noinline int
> -flush_test(struct drm_i915_private *i915, unsigned int flags)
> -{
> - struct wedge_me w;
> -
> - cond_resched();
> -
> - wedge_on_timeout(&w, i915, HZ)
> - i915_gem_wait_for_idle(i915, flags);
> -
> - return i915_terminally_wedged(&i915->gpu_error) ? -EIO : 0;
> -}
> -
> static void spinner_end(struct spinner *spin)
> {
> *spin->batch = MI_BATCH_BUFFER_END;
> @@ -295,7 +241,7 @@ static int live_sanitycheck(void *arg)
> }
>
> spinner_end(&spin);
> - if (flush_test(i915, I915_WAIT_LOCKED)) {
> + if (igt_flush_test(i915, I915_WAIT_LOCKED)) {
> err = -EIO;
> goto err_ctx;
> }
> @@ -307,7 +253,7 @@ static int live_sanitycheck(void *arg)
> err_spin:
> spinner_fini(&spin);
> err_unlock:
> - flush_test(i915, I915_WAIT_LOCKED);
> + igt_flush_test(i915, I915_WAIT_LOCKED);
> mutex_unlock(&i915->drm.struct_mutex);
> return err;
> }
> @@ -380,7 +326,7 @@ static int live_preempt(void *arg)
>
> spinner_end(&spin_hi);
> spinner_end(&spin_lo);
> - if (flush_test(i915, I915_WAIT_LOCKED)) {
> + if (igt_flush_test(i915, I915_WAIT_LOCKED)) {
> err = -EIO;
> goto err_ctx_lo;
> }
> @@ -396,7 +342,7 @@ static int live_preempt(void *arg)
> err_spin_hi:
> spinner_fini(&spin_hi);
> err_unlock:
> - flush_test(i915, I915_WAIT_LOCKED);
> + igt_flush_test(i915, I915_WAIT_LOCKED);
> mutex_unlock(&i915->drm.struct_mutex);
> return err;
> }
> @@ -470,7 +416,7 @@ static int live_late_preempt(void *arg)
>
> spinner_end(&spin_hi);
> spinner_end(&spin_lo);
> - if (flush_test(i915, I915_WAIT_LOCKED)) {
> + if (igt_flush_test(i915, I915_WAIT_LOCKED)) {
> err = -EIO;
> goto err_ctx_lo;
> }
> @@ -486,7 +432,7 @@ static int live_late_preempt(void *arg)
> err_spin_hi:
> spinner_fini(&spin_hi);
> err_unlock:
> - flush_test(i915, I915_WAIT_LOCKED);
> + igt_flush_test(i915, I915_WAIT_LOCKED);
> mutex_unlock(&i915->drm.struct_mutex);
> return err;
>
> --
> 2.17.0
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
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prev parent reply other threads:[~2018-05-08 11:39 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-05-05 9:10 [PATCH 1/2] drm/i915/selftests: Refactor common flush_test() Chris Wilson
2018-05-05 9:10 ` [PATCH 2/2] drm/i915/selftests: Flush GPU activity before completing live_contexts Chris Wilson
2018-05-08 10:46 ` Chris Wilson
2018-05-08 11:38 ` Mika Kuoppala
2018-05-08 11:45 ` Chris Wilson
2018-05-05 9:28 ` ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/2] drm/i915/selftests: Refactor common flush_test() Patchwork
2018-05-05 9:43 ` ✓ Fi.CI.BAT: success " Patchwork
2018-05-05 10:31 ` ✓ Fi.CI.IGT: " Patchwork
2018-05-08 11:39 ` Mika Kuoppala [this message]
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