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From: Jani Nikula <jani.nikula@intel.com>
To: intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org
Cc: ville.syrjala@linux.intel.com
Subject: Re: [PATCH v2 3/8] drm/i915/pps: add vlv_pps_pipe_init()
Date: Mon, 09 Sep 2024 15:22:35 +0300	[thread overview]
Message-ID: <87y141kodw.fsf@intel.com> (raw)
In-Reply-To: <d400819a5017a42223fa226a58892ba974b22c79.1725883885.git.jani.nikula@intel.com>

On Mon, 09 Sep 2024, Jani Nikula <jani.nikula@intel.com> wrote:
> We need to track PPS also for non-eDP usage on VLV/CHV. Add new
> vlv_pps_pipe_init() for initializing the related parts, hiding the PPS
> pipe details inside PPS code.
>
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_dp.c  | 6 ++----
>  drivers/gpu/drm/i915/display/intel_pps.c | 7 +++++++
>  drivers/gpu/drm/i915/display/intel_pps.h | 2 ++
>  3 files changed, 11 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
> index 7e36a7820fec..f0866ddc707e 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -6869,10 +6869,8 @@ intel_dp_init_connector(struct intel_digital_port *dig_port,
>  	intel_dp_set_default_sink_rates(intel_dp);
>  	intel_dp_set_default_max_sink_lane_count(intel_dp);
>  
> -	if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) {
> -		intel_dp->pps.vlv_pps_pipe = INVALID_PIPE;
> -		intel_dp->pps.vlv_active_pipe = vlv_active_pipe(intel_dp);
> -	}
> +	if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv))
> +		vlv_pps_pipe_init(intel_dp);
>  
>  	intel_dp_aux_init(intel_dp);
>  	intel_connector->dp.dsc_decompression_aux = &intel_dp->aux;
> diff --git a/drivers/gpu/drm/i915/display/intel_pps.c b/drivers/gpu/drm/i915/display/intel_pps.c
> index 2fb32ac1b7cf..c316950218c0 100644
> --- a/drivers/gpu/drm/i915/display/intel_pps.c
> +++ b/drivers/gpu/drm/i915/display/intel_pps.c
> @@ -1211,6 +1211,13 @@ static void vlv_steal_power_sequencer(struct intel_display *display,
>  	}
>  }
>  
> +/* Call on all DP, not just eDP */
> +void vlv_pps_pipe_init(struct intel_dp *intel_dp)
> +{
> +	intel_dp->pps.vlv_pps_pipe = INVALID_PIPE;
> +	intel_dp->pps.vlv_active_pipe = vlv_active_pipe(intel_dp);
> +}
> +
>  void vlv_pps_init(struct intel_encoder *encoder,
>  		  const struct intel_crtc_state *crtc_state)
>  {
> diff --git a/drivers/gpu/drm/i915/display/intel_pps.h b/drivers/gpu/drm/i915/display/intel_pps.h
> index 0c5da83a559e..3061fab30097 100644
> --- a/drivers/gpu/drm/i915/display/intel_pps.h
> +++ b/drivers/gpu/drm/i915/display/intel_pps.h
> @@ -42,9 +42,11 @@ void intel_pps_wait_power_cycle(struct intel_dp *intel_dp);
>  
>  bool intel_pps_init(struct intel_dp *intel_dp);
>  void intel_pps_init_late(struct intel_dp *intel_dp);
> +

Hrmh, where did that snug in. :/

>  void intel_pps_encoder_reset(struct intel_dp *intel_dp);
>  void intel_pps_reset_all(struct intel_display *display);
>  
> +void vlv_pps_pipe_init(struct intel_dp *intel_dp);
>  void vlv_pps_init(struct intel_encoder *encoder,
>  		  const struct intel_crtc_state *crtc_state);

-- 
Jani Nikula, Intel

  reply	other threads:[~2024-09-09 12:22 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-09-09 12:15 [PATCH v2 0/8] drm/i915/pps: hide VLV/CHV PPS pipe stuff inside intel_pps.c Jani Nikula
2024-09-09 12:15 ` [PATCH v2 1/8] drm/i915/pps: add vlv_ prefix to pps_pipe and active_pipe members Jani Nikula
2024-09-09 12:15 ` [PATCH v2 2/8] drm/i915/pps: only touch the vlv_ members on VLV/CHV Jani Nikula
2024-09-09 14:21   ` Ville Syrjälä
2024-09-09 18:31     ` Jani Nikula
2024-09-09 12:15 ` [PATCH v2 3/8] drm/i915/pps: add vlv_pps_pipe_init() Jani Nikula
2024-09-09 12:22   ` Jani Nikula [this message]
2024-09-09 12:15 ` [PATCH v2 4/8] drm/i915/pps: add vlv_pps_pipe_reset() Jani Nikula
2024-09-09 12:15 ` [PATCH v2 5/8] drm/i915/pps: add vlv_pps_port_disable() Jani Nikula
2024-09-09 12:15 ` [PATCH v2 6/8] drm/i915/pps: rename vlv_pps_init() to vlv_pps_port_enable() Jani Nikula
2024-09-09 14:27   ` Ville Syrjälä
2024-09-09 12:15 ` [PATCH v2 7/8] drm/i915/pps: add vlv_pps_backlight_initial_pipe() Jani Nikula
2024-09-09 12:15 ` [PATCH v2 8/8] drm/i915/pps: move vlv_active_pipe() to intel_pps.c Jani Nikula
2024-09-09 16:43 ` ✗ Fi.CI.SPARSE: warning for drm/i915/pps: hide VLV/CHV PPS pipe stuff inside intel_pps.c (rev2) Patchwork
2024-09-09 16:52 ` ✓ Fi.CI.BAT: success " Patchwork
2024-09-10 20:37 ` ✗ Fi.CI.IGT: failure " Patchwork

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