From: Mika Kuoppala <mika.kuoppala@linux.intel.com>
To: Chris Wilson <chris@chris-wilson.co.uk>, intel-gfx@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH 5/5] drm/i915/execlsts: Mark up racy inspection of current i915_request priority
Date: Mon, 09 Mar 2020 19:02:57 +0200 [thread overview]
Message-ID: <87zhcp1mwu.fsf@gaia.fi.intel.com> (raw)
In-Reply-To: <20200309110934.868-5-chris@chris-wilson.co.uk>
Chris Wilson <chris@chris-wilson.co.uk> writes:
> [ 120.176548] BUG: KCSAN: data-race in __i915_schedule [i915] / effective_prio [i915]
> [ 120.176566]
> [ 120.176577] write to 0xffff8881e35e6540 of 4 bytes by task 730 on cpu 3:
> [ 120.176792] __i915_schedule+0x63e/0x920 [i915]
> [ 120.177007] __bump_priority+0x63/0x80 [i915]
> [ 120.177220] __i915_sched_node_add_dependency+0x258/0x300 [i915]
> [ 120.177438] i915_sched_node_add_dependency+0x50/0xa0 [i915]
> [ 120.177654] i915_request_await_dma_fence+0x1da/0x530 [i915]
> [ 120.177867] i915_request_await_object+0x2fe/0x470 [i915]
> [ 120.178081] i915_gem_do_execbuffer+0x45dc/0x4c20 [i915]
> [ 120.178292] i915_gem_execbuffer2_ioctl+0x2c3/0x580 [i915]
> [ 120.178309] drm_ioctl_kernel+0xe4/0x120
> [ 120.178322] drm_ioctl+0x297/0x4c7
> [ 120.178335] ksys_ioctl+0x89/0xb0
> [ 120.178348] __x64_sys_ioctl+0x42/0x60
> [ 120.178361] do_syscall_64+0x6e/0x2c0
> [ 120.178375] entry_SYSCALL_64_after_hwframe+0x44/0xa9
> [ 120.178387]
> [ 120.178397] read to 0xffff8881e35e6540 of 4 bytes by interrupt on cpu 2:
> [ 120.178606] effective_prio+0x25/0xc0 [i915]
> [ 120.178812] process_csb+0xe8b/0x10a0 [i915]
> [ 120.179021] execlists_submission_tasklet+0x30/0x170 [i915]
> [ 120.179038] tasklet_action_common.isra.0+0x42/0xa0
> [ 120.179053] __do_softirq+0xd7/0x2cd
> [ 120.179066] irq_exit+0xbe/0xe0
> [ 120.179078] do_IRQ+0x51/0x100
> [ 120.179090] ret_from_intr+0x0/0x1c
> [ 120.179104] cpuidle_enter_state+0x1b8/0x5d0
> [ 120.179117] cpuidle_enter+0x50/0x90
> [ 120.179131] do_idle+0x1a1/0x1f0
> [ 120.179145] cpu_startup_entry+0x14/0x16
> [ 120.179158] start_secondary+0x120/0x180
> [ 120.179172] secondary_startup_64+0xa4/0xb0
>
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> ---
> drivers/gpu/drm/i915/gt/intel_lrc.c | 2 +-
> drivers/gpu/drm/i915/i915_scheduler.c | 2 +-
> 2 files changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/gt/intel_lrc.c b/drivers/gpu/drm/i915/gt/intel_lrc.c
> index 20dd3c2cfa2f..3eb7adc4e057 100644
> --- a/drivers/gpu/drm/i915/gt/intel_lrc.c
> +++ b/drivers/gpu/drm/i915/gt/intel_lrc.c
> @@ -293,7 +293,7 @@ static inline struct i915_priolist *to_priolist(struct rb_node *rb)
>
> static inline int rq_prio(const struct i915_request *rq)
> {
> - return rq->sched.attr.priority;
> + return READ_ONCE(rq->sched.attr.priority);
> }
>
> static int effective_prio(const struct i915_request *rq)
> diff --git a/drivers/gpu/drm/i915/i915_scheduler.c b/drivers/gpu/drm/i915/i915_scheduler.c
> index 52f71e83e088..af51810dc78c 100644
> --- a/drivers/gpu/drm/i915/i915_scheduler.c
> +++ b/drivers/gpu/drm/i915/i915_scheduler.c
> @@ -321,7 +321,7 @@ static void __i915_schedule(struct i915_sched_node *node,
>
> GEM_BUG_ON(node_to_request(node)->engine != engine);
>
> - node->attr.priority = prio;
> + WRITE_ONCE(node->attr.priority, prio);
Ah the symmetry,
Reviewed-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
>
> /*
> * Once the request is ready, it will be placed into the
> --
> 2.20.1
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next prev parent reply other threads:[~2020-03-09 17:04 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-03-09 11:09 [Intel-gfx] [PATCH 1/5] drm/i915: Mark up unlocked update of i915_request.hwsp_seqno Chris Wilson
2020-03-09 11:09 ` [Intel-gfx] [PATCH 2/5] drm/i915/gt: Mark up racy check of last list element Chris Wilson
2020-03-09 16:09 ` Mika Kuoppala
2020-03-09 11:09 ` [Intel-gfx] [PATCH 3/5] drm/i915/execlists: Track active elements during dequeue Chris Wilson
2020-03-09 11:09 ` [Intel-gfx] [PATCH 4/5] drm/i915/execlists: Mark up read of i915_request.fence.flags Chris Wilson
2020-03-09 16:49 ` Mika Kuoppala
2020-03-09 11:09 ` [Intel-gfx] [PATCH 5/5] drm/i915/execlsts: Mark up racy inspection of current i915_request priority Chris Wilson
2020-03-09 17:02 ` Mika Kuoppala [this message]
2020-03-09 12:28 ` [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/5] drm/i915: Mark up unlocked update of i915_request.hwsp_seqno Patchwork
2020-03-09 14:03 ` [Intel-gfx] [PATCH 1/5] " Mika Kuoppala
2020-03-09 14:10 ` Chris Wilson
2020-03-09 15:21 ` Mika Kuoppala
2020-03-09 16:04 ` Chris Wilson
2020-03-09 15:57 ` [Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [1/5] " Patchwork
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