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From: Mika Kuoppala <mika.kuoppala@linux.intel.com>
To: Arun Siluvery <arun.siluvery@linux.intel.com>,
	intel-gfx@lists.freedesktop.org
Subject: Re: [RFC 0/2] Add Pooled EU support
Date: Mon, 13 Jul 2015 13:16:09 +0300	[thread overview]
Message-ID: <87zj30mkgm.fsf@gaia.fi.intel.com> (raw)
In-Reply-To: <1436549720-34166-1-git-send-email-arun.siluvery@linux.intel.com>

Arun Siluvery <arun.siluvery@linux.intel.com> writes:

> These patches enabled Pooled EU support for BXT, they are implemented
> by Armin Reese. I am sending these patches in its current form for comments.
>
> These patches modify Golden batch to have a set of modification values
> where we can change the commands based on Gen. The commands to enable
> Pooled EU are inserted after MI_BATCH_BUFFER_END. If the given Gen
> supports this feature, modification values are used to replace
> MI_BATCH_BUFFER_END so we send commands to enable Pooled EU. These
> commands need to be part of this batch because they are to be
> initialized only once. Userspace will have option to query the
> availability of this feature, those changes are not included in
> this series.
>
> I would like to upstream this feature and really appreciate any
> comments in this regard.
>

Latest command stream programming guide has this to say
in context initialization:

"Render CS Only: Render state need not be initialized"

If it is so that we get a proper render state from hw,
with 'Restore Inhibit', then we can get rid of golden
context for skl+.

-Mika

> Armin Reese (2):
>   drm/i915: Offsets for golden context BB modification
>   drm/i915/bxt: Enable pooled EUs for BXT
>
>  drivers/gpu/drm/i915/i915_gem_render_state.c  | 125 +++++++++++++++++++++++++-
>  drivers/gpu/drm/i915/i915_gem_render_state.h  |   7 ++
>  drivers/gpu/drm/i915/intel_renderstate.h      |   6 +-
>  drivers/gpu/drm/i915/intel_renderstate_gen6.c |   4 +
>  drivers/gpu/drm/i915/intel_renderstate_gen7.c |   4 +
>  drivers/gpu/drm/i915/intel_renderstate_gen8.c |   4 +
>  drivers/gpu/drm/i915/intel_renderstate_gen9.c |  18 ++--
>  7 files changed, 157 insertions(+), 11 deletions(-)
>
> -- 
> 1.9.1
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
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      parent reply	other threads:[~2015-07-13 10:16 UTC|newest]

Thread overview: 8+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-07-10 17:35 [RFC 0/2] Add Pooled EU support Arun Siluvery
2015-07-10 17:35 ` [RFC 1/2] drm/i915: Offsets for golden context BB modification Arun Siluvery
2015-07-10 17:35 ` [RFC 2/2] drm/i915/bxt: Enable pooled EUs for BXT Arun Siluvery
2015-07-11 19:05 ` [RFC 0/2] Add Pooled EU support Chris Wilson
2015-07-11 19:09   ` Chris Wilson
2015-07-13 15:00     ` Siluvery, Arun
2015-07-13 19:58       ` Chris Wilson
2015-07-13 10:16 ` Mika Kuoppala [this message]

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