Re: [PATCH v2] drm/i915/psr: Enable PSR1 on gen-9+ HW

[Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>]

On Mon, 2018-10-01 at 15:17 -0700, Rodrigo Vivi wrote:
> On Thu, Sep 27, 2018 at 11:11:17PM -0700, Dhinakaran Pandiyan wrote:
> > We have new tests and fixes in place since the feature was last
> > disabled. Try again for gen-9+ hardware and enable only PSR1 by
> > default as
> > a first step.
> > v2: Remove typo fix and comment improvements (Rodrigo)
> > 
> > Cc: Jani Nikula <jani.nikula@intel.com>
> > Cc: Jose Roberto de Souza <jose.souza@intel.com>
> > Cc: Paulo Zanoni <paulo.r.zanoni@intel.com>
> > Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
> > Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > References: commit 2ee7dc497e34 ("drm/i915: disable PSR by default
> > on HSW/BDW")
> > References: commit dcb2e993f3c0 ("Revert "drm/i915: Enable PSR by
> > default on Valleyview and Cherryview."")
> > Signed-off-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
> 
> It seems that we still need to wait and check why shard-skl wasn't up
> on this CI,
The results from shard-skl look okay, time to merge this?

-DK

> but patch itself is right, so
> 
> Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
> 
> > ---
> >  drivers/gpu/drm/i915/intel_psr.c | 13 +++++++------
> >  1 file changed, 7 insertions(+), 6 deletions(-)
> > 
> > diff --git a/drivers/gpu/drm/i915/intel_psr.c
> > b/drivers/gpu/drm/i915/intel_psr.c
> > index b6838b525502..5a2660ad8203 100644
> > --- a/drivers/gpu/drm/i915/intel_psr.c
> > +++ b/drivers/gpu/drm/i915/intel_psr.c
> > @@ -71,6 +71,10 @@ static bool psr_global_enabled(u32 debug)
> >  static bool intel_psr2_enabled(struct drm_i915_private *dev_priv,
> >  			       const struct intel_crtc_state
> > *crtc_state)
> >  {
> > +	/* Disable PSR2 by default for all platforms */
> > +	if (i915_modparams.enable_psr == -1)
> > +		return false;
> > +
> >  	switch (dev_priv->psr.debug & I915_PSR_DEBUG_MODE_MASK) {
> >  	case I915_PSR_DEBUG_FORCE_PSR1:
> >  		return false;
> > @@ -1065,12 +1069,9 @@ void intel_psr_init(struct drm_i915_private
> > *dev_priv)
> >  	if (!dev_priv->psr.sink_support)
> >  		return;
> >  
> > -	if (i915_modparams.enable_psr == -1) {
> > -		i915_modparams.enable_psr = dev_priv->vbt.psr.enable;
> > -
> > -		/* Per platform default: all disabled. */
> > -		i915_modparams.enable_psr = 0;
> > -	}
> > +	if (i915_modparams.enable_psr == -1)
> > +		if (INTEL_GEN(dev_priv) < 9 || !dev_priv-
> > >vbt.psr.enable)
> > +			i915_modparams.enable_psr = 0;
> >  
> >  	/* Set link_standby x link_off defaults */
> >  	if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv))
> > -- 
> > 2.17.1
> > 
> > _______________________________________________
> > Intel-gfx mailing list
> > Intel-gfx@lists.freedesktop.org
> > https://lists.freedesktop.org/mailman/listinfo/intel-gfx

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