From: shuang.he@intel.com
To: shuang.he@intel.com, intel-gfx@lists.freedesktop.org,
damien.lespiau@intel.com
Subject: Re: [PATCH 2/2] drm/i915: Gen9 shadowed registers
Date: 21 Nov 2014 23:22:46 -0800 [thread overview]
Message-ID: <898e4a$cglkb7@FMSMGA003.fm.intel.com> (raw)
In-Reply-To: <1416490976-3179-3-git-send-email-damien.lespiau@intel.com>
Tested-By: PRC QA PRTS (Patch Regression Test System Contact: shuang.he@intel.com)
-------------------------------------Summary-------------------------------------
Platform Delta drm-intel-nightly Series Applied
PNV 367/367 367/367
ILK +2 373/375 375/375
SNB 450/450 450/450
IVB -2 503/503 501/503
BYT 289/289 289/289
HSW -3 567/567 564/567
BDW 417/417 417/417
-------------------------------------Detailed-------------------------------------
Platform Test drm-intel-nightly Series Applied
ILK igt_kms_flip_flip-vs-panning NSPT(1, M26) PASS(2, M37)
ILK igt_kms_flip_nonexisting-fb DMESG_WARN(1, M26) PASS(2, M37)
IVB igt_gem_bad_reloc_negative-reloc PASS(1, M21) NSPT(2, M34)
IVB igt_gem_bad_reloc_negative-reloc-lut PASS(1, M21) NSPT(1, M34)PASS(1, M34)
HSW igt_gem_bad_reloc_negative-reloc-lut PASS(1, M19) NSPT(2, M40)
HSW igt_kms_rotation_crc_primary-rotation PASS(1, M19) DMESG_WARN(1, M40)PASS(1, M40)
HSW igt_pm_rc6_residency_rc6-accuracy PASS(1, M19) FAIL(1, M40)PASS(1, M40)
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next prev parent reply other threads:[~2014-11-22 7:32 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-11-20 13:42 [PATCH 0/2] SKL stage 1 part 4 Damien Lespiau
2014-11-20 13:42 ` [PATCH 1/2] drm/i915/skl: Gen9 multi-engine forcewake Damien Lespiau
2014-11-20 13:42 ` [PATCH 2/2] drm/i915: Gen9 shadowed registers Damien Lespiau
2014-11-22 7:22 ` shuang.he [this message]
2014-11-20 14:09 ` [PATCH 0/2] SKL stage 1 part 4 Daniel Vetter
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