Re: [Intel-gfx] [PATCH] drm/i915: Fix one wrong caching mode enum usage

[Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>]

On 07/07/2023 14:23, Upadhyay, Tejas wrote:
> 
> 
>> -----Original Message-----
>> From: Intel-gfx <intel-gfx-bounces@lists.freedesktop.org> On Behalf Of
>> Tvrtko Ursulin
>> Sent: Friday, July 7, 2023 6:25 PM
>> To: Intel-gfx@lists.freedesktop.org; dri-devel@lists.freedesktop.org
>> Subject: [Intel-gfx] [PATCH] drm/i915: Fix one wrong caching mode enum
>> usage
>>
>> From: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
>>
>> Commit a4d86249c773 ("drm/i915/gt: Provide a utility to create a scratch
>> buffer") mistakenly passed in uapi I915_CACHING_CACHED as argument to
>> i915_gem_object_set_cache_coherency(), which actually takes internal enum
>> i915_cache_level.
>>
>> No functional issue since the value matches I915_CACHE_LLC (1 == 1), which
>> is the intended caching mode, but lets clean it up nevertheless.
>>
>> Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
>> Fixes: a4d86249c773 ("drm/i915/gt: Provide a utility to create a scratch
>> buffer")
>> Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
>> ---
>>   drivers/gpu/drm/i915/gt/intel_gtt.c | 2 +-
>>   1 file changed, 1 insertion(+), 1 deletion(-)
>>
>> diff --git a/drivers/gpu/drm/i915/gt/intel_gtt.c
>> b/drivers/gpu/drm/i915/gt/intel_gtt.c
>> index 126269a0d728..065099362a98 100644
>> --- a/drivers/gpu/drm/i915/gt/intel_gtt.c
>> +++ b/drivers/gpu/drm/i915/gt/intel_gtt.c
>> @@ -676,7 +676,7 @@ __vm_create_scratch_for_read(struct
>> i915_address_space *vm, unsigned long size)
>>   	if (IS_ERR(obj))
>>   		return ERR_CAST(obj);
>>
>> -	i915_gem_object_set_cache_coherency(obj,
>> I915_CACHING_CACHED);
>> +	i915_gem_object_set_cache_coherency(obj, I915_CACHE_LLC);
> 
> Yes.
> Reviewed-by: Tejas Upadhyay <tejas.upadhyay@intel.com>

Pushed, thanks for the review!

Regards,

Tvrtko

> 
>>
>>   	vma = i915_vma_instance(obj, vm, NULL);
>>   	if (IS_ERR(vma)) {
>> --
>> 2.39.2
>