From: "Souza, Jose" <jose.souza@intel.com>
To: "ville.syrjala@linux.intel.com" <ville.syrjala@linux.intel.com>,
"intel-gfx@lists.freedesktop.org"
<intel-gfx@lists.freedesktop.org>
Subject: Re: [PATCH 2/2] drm/i915: Just use icl+ definition for PLANE_WM blocks field
Date: Wed, 6 Feb 2019 01:04:19 +0000 [thread overview]
Message-ID: <8f3d01ea525025c2613bfbb8207e11daf216d3c5.camel@intel.com> (raw)
In-Reply-To: <20190205205056.30081-2-ville.syrjala@linux.intel.com>
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On Tue, 2019-02-05 at 22:50 +0200, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> The unused bits on PLANE_WM & co. are hardwired to zero. So no
> need to worry about reading the extra bit on pre-icl.
>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
> drivers/gpu/drm/i915/i915_reg.h | 3 +--
> drivers/gpu/drm/i915/intel_pm.c | 9 ++-------
> 2 files changed, 3 insertions(+), 9 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_reg.h
> b/drivers/gpu/drm/i915/i915_reg.h
> index 2be34e13af78..638a586469f9 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -6784,8 +6784,7 @@ enum {
>
> #define _PLANE_BUF_CFG_1_B 0x7127c
> #define _PLANE_BUF_CFG_2_B 0x7137c
> -#define SKL_DDB_ENTRY_MASK 0x3FF
> -#define ICL_DDB_ENTRY_MASK 0x7FF
> +#define DDB_ENTRY_MASK 0x7FF /* skl+:
> 10 bits, icl+ 11 bits */
> #define DDB_ENTRY_END_SHIFT 16
> #define _PLANE_BUF_CFG_1(pipe) \
> _PIPE(pipe, _PLANE_BUF_CFG_1_A, _PLANE_BUF_CFG_1_B)
> diff --git a/drivers/gpu/drm/i915/intel_pm.c
> b/drivers/gpu/drm/i915/intel_pm.c
> index 737005bf6816..0f15685529a0 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -3927,14 +3927,9 @@ static unsigned int skl_cursor_allocation(int
> num_active)
> static void skl_ddb_entry_init_from_hw(struct drm_i915_private
> *dev_priv,
> struct skl_ddb_entry *entry, u32
> reg)
> {
> - u16 mask;
>
> - if (INTEL_GEN(dev_priv) >= 11)
> - mask = ICL_DDB_ENTRY_MASK;
> - else
> - mask = SKL_DDB_ENTRY_MASK;
> - entry->start = reg & mask;
> - entry->end = (reg >> DDB_ENTRY_END_SHIFT) & mask;
> + entry->start = reg & DDB_ENTRY_MASK;
> + entry->end = (reg >> DDB_ENTRY_END_SHIFT) & DDB_ENTRY_MASK;
>
> if (entry->end)
> entry->end += 1;
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next prev parent reply other threads:[~2019-02-06 1:04 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-02-05 20:50 [PATCH 1/2] drm/i915: Bump skl+ wm blocks to 11 bits Ville Syrjala
2019-02-05 20:50 ` [PATCH 2/2] drm/i915: Just use icl+ definition for PLANE_WM blocks field Ville Syrjala
2019-02-06 1:04 ` Souza, Jose [this message]
2019-02-06 13:18 ` Ville Syrjälä
2019-02-07 0:21 ` Souza, Jose
2019-02-05 21:34 ` ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915: Bump skl+ wm blocks to 11 bits Patchwork
2019-02-06 0:47 ` [PATCH 1/2] " Souza, Jose
2019-02-06 3:28 ` ✓ Fi.CI.IGT: success for series starting with [1/2] " Patchwork
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