From: "Pottumuttu, Sai Teja" <sai.teja.pottumuttu@intel.com>
To: Dnyaneshwar Bhadane <dnyaneshwar.bhadane@intel.com>,
<intel-gfx@lists.freedesktop.org>
Subject: Re: [PATCH] drm/i915/pciid: Add new PCI id for ARL
Date: Tue, 10 Sep 2024 13:29:20 +0530 [thread overview]
Message-ID: <8f854bba-c78e-4c81-a78d-04b385ff4641@intel.com> (raw)
In-Reply-To: <20240910062301.2006782-1-dnyaneshwar.bhadane@intel.com>
On 10-09-2024 11:53, Dnyaneshwar Bhadane wrote:
> Add new PCI id for ARL platform.
>
> Signed-off-by: Dnyaneshwar Bhadane <dnyaneshwar.bhadane@intel.com>
I assume that you would send another patch to sync this PCI ID addition
in xe_pciids.h as well
With that,
Reviewed-by: Sai Teja Pottumuttu <sai.teja.pottumuttu@intel.com>
> ---
> include/drm/intel/i915_pciids.h | 3 ++-
> 1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/include/drm/intel/i915_pciids.h b/include/drm/intel/i915_pciids.h
> index cbb12fdbcb7f..02156c6f79b6 100644
> --- a/include/drm/intel/i915_pciids.h
> +++ b/include/drm/intel/i915_pciids.h
> @@ -769,7 +769,8 @@
> MACRO__(0x7D41, ## __VA_ARGS__), \
> MACRO__(0x7D51, ## __VA_ARGS__), \
> MACRO__(0x7D67, ## __VA_ARGS__), \
> - MACRO__(0x7DD1, ## __VA_ARGS__)
> + MACRO__(0x7DD1, ## __VA_ARGS__), \
> + MACRO__(0xB640, ## __VA_ARGS__)
>
> /* MTL */
> #define INTEL_MTL_IDS(MACRO__, ...) \
next prev parent reply other threads:[~2024-09-10 8:00 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-09-10 6:23 [PATCH] drm/i915/pciid: Add new PCI id for ARL Dnyaneshwar Bhadane
2024-09-10 7:46 ` Garg, Nemesa
2024-09-10 7:59 ` Pottumuttu, Sai Teja [this message]
2024-09-10 10:21 ` Jani Nikula
2024-09-10 13:02 ` ✓ Fi.CI.BAT: success for " Patchwork
2024-09-11 6:40 ` ✗ Fi.CI.IGT: failure " Patchwork
2024-09-20 20:37 ` Matt Roper
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