From: "Belgaumkar, Vinay" <vinay.belgaumkar@intel.com>
To: <John.C.Harrison@Intel.com>, <Intel-GFX@Lists.FreeDesktop.Org>
Cc: DRI-Devel@Lists.FreeDesktop.Org
Subject: Re: [Intel-gfx] [PATCH 2/2] drm/i915/guc: Enable WA 14018913170
Date: Thu, 5 Oct 2023 17:37:29 -0700 [thread overview]
Message-ID: <925ced5a-5b0a-b08d-c4f6-36905ec1e450@intel.com> (raw)
In-Reply-To: <20230914222813.278774-3-John.C.Harrison@Intel.com>
On 9/14/2023 3:28 PM, John.C.Harrison@Intel.com wrote:
> From: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
>
> The GuC handles the WA, the KMD just needs to set the flag to enable
> it on the appropriate platforms.
>
> Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
> Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
> ---
> drivers/gpu/drm/i915/gt/uc/intel_guc.c | 6 ++++++
> drivers/gpu/drm/i915/gt/uc/intel_guc.h | 1 +
> drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h | 1 +
> 3 files changed, 8 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc.c b/drivers/gpu/drm/i915/gt/uc/intel_guc.c
> index 27df41c53b890..3f3df1166b860 100644
> --- a/drivers/gpu/drm/i915/gt/uc/intel_guc.c
> +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc.c
> @@ -319,6 +319,12 @@ static u32 guc_ctl_wa_flags(struct intel_guc *guc)
> if (!RCS_MASK(gt))
> flags |= GUC_WA_RCS_REGS_IN_CCS_REGS_LIST;
>
> + /* Wa_14018913170 */
> + if (GUC_FIRMWARE_VER(guc) >= MAKE_GUC_VER(70, 7, 0)) {
> + if (IS_DG2(gt->i915) || IS_METEORLAKE(gt->i915) || IS_PONTEVECCHIO(gt->i915))
> + flags |= GUC_WA_ENABLE_TSC_CHECK_ON_RC6;
> + }
> +
> return flags;
LGTM,
Reviewed-by: Vinay Belgaumkar <vinay.belgaumkar@intel.com>
> }
>
> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc.h b/drivers/gpu/drm/i915/gt/uc/intel_guc.h
> index 6c392bad29c19..818c8c146fd47 100644
> --- a/drivers/gpu/drm/i915/gt/uc/intel_guc.h
> +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc.h
> @@ -295,6 +295,7 @@ struct intel_guc {
> #define MAKE_GUC_VER(maj, min, pat) (((maj) << 16) | ((min) << 8) | (pat))
> #define MAKE_GUC_VER_STRUCT(ver) MAKE_GUC_VER((ver).major, (ver).minor, (ver).patch)
> #define GUC_SUBMIT_VER(guc) MAKE_GUC_VER_STRUCT((guc)->submission_version)
> +#define GUC_FIRMWARE_VER(guc) MAKE_GUC_VER_STRUCT((guc)->fw.file_selected.ver)
>
> static inline struct intel_guc *log_to_guc(struct intel_guc_log *log)
> {
> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h b/drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h
> index b4d56eccfb1f0..123ad75d2eb28 100644
> --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h
> +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h
> @@ -100,6 +100,7 @@
> #define GUC_WA_HOLD_CCS_SWITCHOUT BIT(17)
> #define GUC_WA_POLLCS BIT(18)
> #define GUC_WA_RCS_REGS_IN_CCS_REGS_LIST BIT(21)
> +#define GUC_WA_ENABLE_TSC_CHECK_ON_RC6 BIT(22)
>
> #define GUC_CTL_FEATURE 2
> #define GUC_CTL_ENABLE_SLPC BIT(2)
next prev parent reply other threads:[~2023-10-06 0:37 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-09-14 22:28 [Intel-gfx] [PATCH 0/2] Enable Wa_14018913170 on DG2/MTL/PVD John.C.Harrison
2023-09-14 22:28 ` [Intel-gfx] [PATCH 1/2] drm/i915/guc: Update 'recommended' version to 70.11.0 for DG2/ADL-P/MTL John.C.Harrison
2023-09-14 22:28 ` [Intel-gfx] [PATCH 2/2] drm/i915/guc: Enable WA 14018913170 John.C.Harrison
2023-10-06 0:37 ` Belgaumkar, Vinay [this message]
2023-09-15 1:06 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for Enable Wa_14018913170 on DG2/MTL/PVD Patchwork
2023-09-15 1:19 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2023-09-15 8:48 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
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