From: John Harrison <john.c.harrison@intel.com>
To: Matthew Brost <matthew.brost@intel.com>,
<intel-gfx@lists.freedesktop.org>,
<dri-devel@lists.freedesktop.org>
Cc: <thomas.hellstrom@linux.intel.com>
Subject: Re: [Intel-gfx] [PATCH 4/5] drm/i915/guc: Enable GuC submission by default on DG1
Date: Thu, 16 Sep 2021 10:23:59 -0700 [thread overview]
Message-ID: <9e3c5b1f-7056-8f73-2d24-649fd19764d8@intel.com> (raw)
In-Reply-To: <20210916162819.27848-5-matthew.brost@intel.com>
On 9/16/2021 09:28, Matthew Brost wrote:
> Enable GuC submission by default on DG1
>
> Signed-off-by: Matthew Brost <matthew.brost@intel.com>
Reviewed-by: John Harrison <John.C.Harrison@Intel.com>
> ---
> drivers/gpu/drm/i915/gt/uc/intel_uc.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_uc.c b/drivers/gpu/drm/i915/gt/uc/intel_uc.c
> index 86c318516e14..2fef3b0bbe95 100644
> --- a/drivers/gpu/drm/i915/gt/uc/intel_uc.c
> +++ b/drivers/gpu/drm/i915/gt/uc/intel_uc.c
> @@ -35,7 +35,7 @@ static void uc_expand_default_options(struct intel_uc *uc)
> }
>
> /* Intermediate platforms are HuC authentication only */
> - if (IS_DG1(i915) || IS_ALDERLAKE_S(i915)) {
> + if (IS_ALDERLAKE_S(i915)) {
> i915->params.enable_guc = ENABLE_GUC_LOAD_HUC;
> return;
> }
next prev parent reply other threads:[~2021-09-16 17:24 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-09-16 16:28 [Intel-gfx] [PATCH 0/5] Enable GuC submission by default on DG1 Matthew Brost
2021-09-16 16:28 ` [Intel-gfx] [PATCH 1/5] drm/i915: Do not define vma on stack Matthew Brost
2021-09-16 16:28 ` [Intel-gfx] [PATCH 2/5] drm/i915/guc: put all guc objects in lmem when available Matthew Brost
2021-09-16 16:28 ` [Intel-gfx] [PATCH 3/5] drm/i915/guc: Add DG1 GuC / HuC firmware defs Matthew Brost
2021-09-16 16:28 ` [Intel-gfx] [PATCH 4/5] drm/i915/guc: Enable GuC submission by default on DG1 Matthew Brost
2021-09-16 17:23 ` John Harrison [this message]
2021-09-16 16:28 ` [Intel-gfx] [PATCH 5/5] drm/i915: Take pinning into account in __i915_gem_object_is_lmem Matthew Brost
2021-09-16 17:07 ` Thomas Hellström
2021-09-16 21:40 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for Enable GuC submission by default on DG1 (rev7) Patchwork
2021-09-16 22:01 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2021-09-17 1:23 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
-- strict thread matches above, loose matches on Subject: below --
2021-09-14 4:49 [Intel-gfx] [PATCH 0/5] Enable GuC submission by default on DG1 Matthew Brost
2021-09-14 4:49 ` [Intel-gfx] [PATCH 4/5] drm/i915/guc: " Matthew Brost
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