From: "Iddamsetty, Aravind" <aravind.iddamsetty@intel.com>
To: John Harrison <john.c.harrison@intel.com>,
Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>,
<intel-gfx@lists.freedesktop.org>
Cc: Alan Previn <alan.previn.teres.alexis@intel.com>,
dri-devel@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH v2 5/7] drm/i915/mtl: Handle wopcm per-GT and limit calculations.
Date: Wed, 19 Oct 2022 15:09:45 +0530 [thread overview]
Message-ID: <9e537caf-58db-bd0f-4305-10ba201ba5d3@intel.com> (raw)
In-Reply-To: <bd37abdb-a9af-3f30-17ed-7a13a9652389@intel.com>
On 19-10-2022 06:14, John Harrison wrote:
> On 10/12/2022 17:03, Daniele Ceraolo Spurio wrote:
>> From: Aravind Iddamsetty <aravind.iddamsetty@intel.com>
>>
>> With MTL standalone media architecture the wopcm layout has changed with
>> separate partitioning in WOPCM for GCD/GT GuC and SA Media GuC. The size
> What is GCD?
Graphics Companion Die, no media on it.
Thanks,
Aravind.
next prev parent reply other threads:[~2022-10-19 9:40 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-10-13 0:03 [Intel-gfx] [PATCH v2 0/7] drm/i915: prepare for uC loading on MTL Daniele Ceraolo Spurio
2022-10-13 0:03 ` [Intel-gfx] [PATCH v2 1/7] drm/i915/huc: only load HuC on GTs that have VCS engines Daniele Ceraolo Spurio
2022-10-19 9:31 ` Iddamsetty, Aravind
2022-10-13 0:03 ` [Intel-gfx] [PATCH v2 2/7] drm/i915/uc: fetch uc firmwares for each GT Daniele Ceraolo Spurio
2022-10-13 0:03 ` [Intel-gfx] [PATCH v2 3/7] drm/i915/uc: use different ggtt pin offsets for uc loads Daniele Ceraolo Spurio
2022-10-17 23:44 ` John Harrison
2022-10-18 20:25 ` Ceraolo Spurio, Daniele
2022-10-13 0:03 ` [Intel-gfx] [PATCH v2 4/7] drm/i915/guc: Add GuC deprivilege feature to MTL Daniele Ceraolo Spurio
2022-10-13 0:03 ` [Intel-gfx] [PATCH v2 5/7] drm/i915/mtl: Handle wopcm per-GT and limit calculations Daniele Ceraolo Spurio
2022-10-19 0:44 ` John Harrison
2022-10-19 3:46 ` Matt Roper
2022-10-19 9:39 ` Iddamsetty, Aravind [this message]
2022-10-20 23:24 ` Ceraolo Spurio, Daniele
2022-10-13 0:03 ` [Intel-gfx] [PATCH v2 6/7] drm/i915/guc: define media GT GuC send regs Daniele Ceraolo Spurio
2022-10-13 0:03 ` [Intel-gfx] [PATCH v2 7/7] drm/i915/guc: handle interrupts from media GuC Daniele Ceraolo Spurio
2022-10-15 0:02 ` Matt Roper
2022-10-13 0:43 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: prepare for uC loading on MTL (rev2) Patchwork
2022-10-13 0:43 ` [Intel-gfx] ✗ Fi.CI.DOCS: " Patchwork
2022-10-13 1:13 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2022-10-13 6:09 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=9e537caf-58db-bd0f-4305-10ba201ba5d3@intel.com \
--to=aravind.iddamsetty@intel.com \
--cc=alan.previn.teres.alexis@intel.com \
--cc=daniele.ceraolospurio@intel.com \
--cc=dri-devel@lists.freedesktop.org \
--cc=intel-gfx@lists.freedesktop.org \
--cc=john.c.harrison@intel.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox