messages from 2012-03-21 19:48:53 to 2012-03-23 18:46:07 UTC [more...]
[PATCH] drm/i915: Initialise GTT MTRR to -1
2012-03-23 18:45 UTC (3+ messages)
[PATCH] drm/i915: add rc6 residency times to debugfs
2012-03-23 18:44 UTC (3+ messages)
[RFCv2] ValleyView support
2012-03-23 17:29 UTC (41+ messages)
` [PATCH 01/26] drm/i915: move NEEDS_FORCE_WAKE to i915_drv.c
` [PATCH 02/26] drm/i915: re-order GT IIR bit definitions
` [PATCH 03/26] drm/i915: add ValleyView driver structs and IS_VALLEYVIEW macro
` [PATCH 04/26] drm/i915: ValleyView watermark support
` [PATCH 05/26] drm/i915: PLL defines for VLV
` [PATCH 06/26] drm/i915: interrupt bit definitions "
` [PATCH 07/26] drm/i915: add ValleyView clock gating init
` [PATCH 08/26] drm/i915: add DPIO read/write functions for ValleyView
` [PATCH 09/26] drm/i915: split PLL update code out of i9xx_crtc_mode_set
` [PATCH 10/26] drm/i915: split LVDS "
` [PATCH 11/26] drm/i915: ValleyView mode setting limits and PLL functions
` [PATCH 12/26] drm/i915: program drain latency regs on ValleyView
` [PATCH 13/26] drm/i915: Enable DP panel power sequencing for ValleyView
` [PATCH 14/26] drm/i915: Enable HDMI on ValleyView
` [PATCH 15/26] agp/intel: map more registers for use by the GTT code
` [PATCH 16/26] agp/intel: add ValleyView AGP driver
` [PATCH 17/26] agp/intel: bind "
` [PATCH 18/26] drm/i915: add ValleyView specific CRT detect function
` [PATCH 19/26] drm/i915: add ValleyView specific force wake get/put functions
` [PATCH 20/26] drm/i915: ValleyView has limited cacheability
` [PATCH 21/26] drm/i915: ValleyView IRQ support
` [PATCH 22/26] drm/i915: display regs are at 0x180000 on ValleyView
` [PATCH 23/26] drm/i915: check for disabled interrupts "
` [PATCH 24/26] drm/i915: add HDMI and DP port enumeration "
` [PATCH 25/26] drm/i915: disable turbo on ValleyView for now
` [PATCH 26/26] drm/i915: bind driver to ValleyView chipsets
[PATCH 0/2] RC6 changes for 3.4 got missing
2012-03-23 15:34 UTC (5+ messages)
` [PATCH 1/2] drm/i915: allow to select rc6 modes via kernel parameter
` [PATCH 2/2] drm/i915: enable plain RC6 on Sandy Bridge by default
[RFC] Try harder to allocate an mmap offset
2012-03-23 10:06 UTC (3+ messages)
` [PATCH 1/5] drm/i915: Release the mmap offset when purging a buffer
Updated -next
2012-03-23 10:03 UTC
[PATCH 0/2 v6] drm/i915: LVDS channel mode fixes
2012-03-22 22:22 UTC (6+ messages)
` [PATCH 1/2] drm/i915: Check VBIOS value for determining LVDS dual channel mode, too
` [PATCH 2/2] drm/i915: Add lvds_channel module option
[RFC] ValleyView support
2012-03-22 21:13 UTC (67+ messages)
` [PATCH 01/25] drm/i915: move NEEDS_FORCE_WAKE to i915_drv.c
` [PATCH 02/25] drm/i915: add debug message when EDID fetch fails
` [PATCH 03/25] drm/i915: re-order GT IIR bit definitions
` [PATCH 04/25] drm/i915: Add basic support for parsing of VBT OEM Custom Block
` [PATCH 05/25] drm/i915: add DPIO read/write functions for ValleyView
` [PATCH 06/25] drm/i915: add ValleyView registers, stub code, and watermark support
` [PATCH 07/25] drm/i915: split out DPLL update code from i9xx_crtc_mode_set
` [PATCH 08/25] drm/i915: ValleyView mode setting limits and PLL functions
` [PATCH 09/25] drm/915: program driain latency regs on ValleyView
` [PATCH 10/25] drm/i915: Enable DP panel power sequencing for ValleyView
` [PATCH 11/25] drm/i915: Enable HDMI on ValleyView
` [PATCH 12/25] agp/intel: map more registers for use by the GTT code
` [PATCH 13/25] agp/intel: add Valleyview specific PTE entry function
` [PATCH 14/25] agp/intel: always use uncached mappings on VLV
` [PATCH 15/25] drm/i915: add ValleyView specific CRT detect function
` [PATCH 16/25] drm/i915: add ValleyView specific force wake get/put functions
` [PATCH 17/25] drm/i915: ValleyView cacheability is different
` [PATCH 18/25] drm/i915: ValleyView IRQ support
` [PATCH 19/25] drm/i915: display regs are at 0x180000 on ValleyView
` [PATCH 20/25] drm/i915: check for disabled interrupts "
` [PATCH 21/25] drm/i915: add HDMI and DP port enumeration "
` [PATCH 22/25] drm/i915: remove some unneeded debug messages
` [PATCH 23/25] drm/i915: add ValleyView clock gating init
` [PATCH 24/25] drm/i915: add has_turbo bit to driver info struct
` [PATCH 25/25] drm/i915: don't write ring regs until they're set up
[PATCH 1/2] drm/i915: [dinq] Fix six instances of -Warray-bounds
2012-03-22 16:53 UTC (3+ messages)
` [PATCH 2/2] drm/i915: [dinq] fix two instances -Wunitialized
[PATCH 0/2] semaphorify the pageflip BO (if possible)
2012-03-22 16:48 UTC (8+ messages)
` [PATCH 1/2] drm/i915: extract ring sync code
` [PATCH 2/2] drm/i915: use semaphores for the display plane
[PATCH] drm/i915: Sanitize BIOS debugging bits from PIPECONF
2012-03-22 15:40 UTC (2+ messages)
[PATCH 1/2] drm/i915: Reorganise rules for get_fence/put_fence
2012-03-22 15:10 UTC (2+ messages)
` [PATCH 2/2] drm/i915: Remove fence pipelining infrastructure
[RFC] [PATCH 00/38] Haswell
2012-03-22 12:28 UTC (60+ messages)
` [PATCH 01/37] drm/i915: add Haswell devices and their PCI IDs
` [PATCH 02/37] drm/i915: add support for LynxPoint PCH
` [PATCH 03/37] drm/i915: add HAS_PLL_SPLIT macro
` [PATCH 04/37] drm/i915: add haswell into the PCH SPLIT company
` [PATCH 05/37] drm/i915: add support for power wells
` [PATCH 06/37] drm/i915: add DDI registers
` [PATCH 07/37] drm/i915: add DP_TP_CTL registers
` [PATCH 08/37] drm/i915: add DP_TP_STATUS registers
` [PATCH 09/37] drm/i915: add definitions for DDI_BUF_CTL registers
` [PATCH 10/37] drm/i915: add definition of LPT FDI port width registers
` [PATCH 11/37] drm/i915: add definition of DDI buffer translations regs
` [PATCH 12/37] drm/i915: add SBI registers
` [PATCH 13/37] drm/i915: add support for SBI ops
` [PATCH 14/37] drm/i915: add PIXCLK_GATE register
` [PATCH 15/37] drm/i915: add S PLL control
` [PATCH 16/37] drm/i915: add port clock selection support for HSW
` [PATCH 17/37] drm/i915: add SSC offsets for SBI access
` [PATCH 18/37] drm/i915: add GTC registers
` [PATCH 19/37] drm/i915: add LCPLL control registers
` [PATCH 20/37] drm/i915: add WM_LINETIME registers
` [PATCH 21/37] drm/i915: calculate watermarks on Gen7 archs in one place
` [PATCH 22/37] drm/i915: program WM_LINETIME on Haswell
` [PATCH 23/37] drm/i915: do not set 6BPP dithering on haswell
` [PATCH 24/37] drm/i915: share forcewaking code between IVB and HSW
` [PATCH 25/37] drm/i915: haswell has 3 pipes as well
` [PATCH 26/37] drm/i915: reuse Ivybridge interrupts code for Haswell
` [PATCH 27/37] drm/i915: share pipe count handling with Ivybridge
` [PATCH 28/37] drm/i915: share IVB cursor routine with Haswell
` [PATCH 29/37] drm/i915: enable power wells on haswell init
` [PATCH 30/37] drm/i915: disable rc6 on haswell for now
` [PATCH 31/37] drm/i915: enable PCH earlier
` [PATCH 32/37] drm/i915: perform Haswell DDI link training in FDI mode
` [PATCH 33/37] drm/i915: double-write DDI translation table
` [PATCH 34/37] drm/i915: do not use fdi_normal_train on haswell
` [PATCH 35/37] drm/i915: program iCLKIP on Lynx Point
` [PATCH 36/37] drm/i915: add warning when using old bits on Haswell/LPT
` [PATCH 37/37] drm/i915: dump registers read/write ops
3d driver
2012-03-22 5:30 UTC
[PATCH] drm/i915: properly restore the ppgtt page directory on resume
2012-03-21 23:14 UTC
RFC: i915 arch changes to better support new chipsets
2012-03-21 20:41 UTC (4+ messages)
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