messages from 2017-04-06 11:32:29 to 2017-04-07 08:12:03 UTC [more...]
[PATCH 0/5] Classify the engines in class + instance (v3)
2017-04-07 8:12 UTC (8+ messages)
` [PATCH 1/5] drm/i915: Classify the engines in class + instance
` [PATCH 2/5] drm/i915: Use the same vfunc for BSD2 ring init
` [PATCH 3/5] drm/i915: Generate the engine name based on the instance number
` [PATCH 4/5] drm/i915: Split the engine info table in two levels, using class + instance
` [PATCH 5/5] drm/i915: Use the engine class to get the context size
` ✓ Fi.CI.BAT: success for Classify the engines in class + instance (rev4)
[PATCH] drm/i915: Treat WC a separate cache domain
2017-04-07 7:44 UTC (3+ messages)
[PATCH 1/2] drm/i915/GuC/GLK: Load GuC on GLK
2017-04-07 7:34 UTC (3+ messages)
` ✓ Fi.CI.BAT: success for series starting with [1/2] "
[PATCH] drm: Take mode_config.mutex in setcrtc ioctl
2017-04-07 7:25 UTC (7+ messages)
` ✗ Fi.CI.BAT: failure for drm: Take mode_config.mutex in setcrtc ioctl (rev2)
[PATCH v2] drm/i915: Advance ring->head fully when idle
2017-04-07 7:25 UTC (4+ messages)
` [PATCH v3] "
` [PATCH v4] "
[maintainer-tools PATCH] dim: Add examples section to dim.rst
2017-04-07 7:23 UTC (3+ messages)
` [maintainer-tools PATCH v2] "
[PATCH 1/2] drm/i915: Assert the engine is idle before overwiting the HWS
2017-04-07 7:22 UTC (4+ messages)
` ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915: Assert the engine is idle before overwiting the HWS (rev3)
` ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915: Assert the engine is idle before overwiting the HWS (rev4)
[PATCH 00/13] drm/i915: Convert connector properties to atomic
2017-04-07 6:27 UTC (15+ messages)
` [PATCH 01/13] drm/i915: Remove unused members from intel_tv.c
` [PATCH 02/13] drm/i915: Convert intel_tv connector properties to atomic, v5
` [PATCH 03/13] drm/i915: Convert intel_dp_mst connector properties to atomic
` [PATCH 04/13] drm/i915: Convert intel_crt "
` [PATCH 05/13] drm/i915: Convert intel DVO connector "
` [PATCH 06/13] drm/i915: Add plumbing for digital connector state
` [PATCH 07/13] drm/i915: Convert DSI connector properties to atomic
` [PATCH 08/13] drm/i915: Convert LVDS "
` [PATCH 09/13] drm/i915: Make intel_dp->has_audio reflect hw state only
` [PATCH 10/13] drm/i915: Convert intel_dp properties to atomic
` [PATCH 11/13] drm/i915: Convert intel_hdmi connector "
` [PATCH 12/13] drm/i915: Handle force_audio correctly in intel_sdvo
` [PATCH 13/13] drm/i915: Convert intel_sdvo connector properties to atomic
` ✗ Fi.CI.BAT: warning for drm/i915: Convert "
[PATCH 01/67] drm/i915/cnp: Introduce Cannonpoint PCH
2017-04-07 5:54 UTC (75+ messages)
` [PATCH 02/67] drm/i915/cnp: Add PCI ID for Cannonpoint LP PCH
` [PATCH 03/67] drm/i915/cnp: Get/set proper Raw clock frequency on CNP
` [PATCH 04/67] drm/i915/cnp: Add Backlight support to CNP PCH
` [PATCH 05/67] drm/i915/cnp: add CNP gmbus support
` [PATCH] "
` [PATCH 06/67] drm/i915/cnp: Panel Power sequence changes for CNP PCH
` [PATCH 07/67] drm/i915/cnl: Introduce Cannonlake platform defition
` [PATCH 08/67] drm/i915/cnl: Cannonlake uses CNP PCH
` [PATCH 09/67] drm/i915/cnl: Add Cannonlake PCI IDs for U-skus
` [PATCH 10/67] drm/i915/cnl: Add Cannonlake PCI IDs for Y-skus
` [PATCH 11/67] drm/i915/cnl: add IS_CNL_REVID macro
` [PATCH 12/67] drm/i915/cnl: Introduce initial Cannonlake Workarounds
` [PATCH 13/67] drm/i915/cnl: Add WaDisableReplayBufferBankArbitrationOptimization
` [PATCH 14/67] drm/i915/cnl: WaDisableEnhancedSBEVertexCaching
` [PATCH 15/67] drm/i915/cnl: Apply large line width optimization
` [PATCH 16/67] drm/i915/cnl: Cannonlake has 4 planes (3 sprites) per pipe
` [PATCH 17/67] drm/i915/cnl: CNL has an increased DDB size
` [PATCH 18/67] drm/i915/cnl: Add initial gen10 golden states
` [PATCH 19/67] drm/i915/cnl: Configure EU slice power gating
` [PATCH 20/67] drm/i915/cnl: Cannonlake has same MOCS table than Skylake
` [PATCH 21/67] drm/i915/cnl: Update the context size
` [PATCH 22/67] drm/i915/cnl: Add RT cache flush pipe control w/a
` [PATCH 23/67] drm/i915/gen10: Set value of Indirect Context Offset for gen10
` [PATCH 24/67] drm/i915/cnl: Add force wake "
` [PATCH 25/67] drm/i915/cnl: Inherit RPS stuff from previous platforms
` [PATCH 26/67] drm/i915/cnl: Add power wells for CNL
` [PATCH 27/67] drm/i915/cnl: Also need power well sanitize
` [PATCH 28/67] drm/i915/cnl: Implement .get_display_clock_speed() for CNL
` [PATCH 29/67] drm/i915/cnl: Implement .set_cdclk() "
` [PATCH 30/67] drm/i915/cnl: Implement CNL display init/unit sequence
` [PATCH 31/67] drm/i915/cnl: Allow dynamic cdclk changes on CNL
` [PATCH 32/67] drm/i915/cnl: DDI - PLL mapping
` [PATCH 33/67] drm/i915: Configure DPLL's for Cannonlake
` [PATCH 34/67] drm/i915/cnl: Initialize PLLs
` [PATCH 35/67] drm/i915/cnl: Enable wrpll computation for CNL
` [PATCH 36/67] drm/i915: Add MMIO helper for 6 ports with different offsets
` [PATCH 37/67] drm/i915/cnl: Add registers related to voltage swing sequences
` [PATCH 38/67] drm/i915/cnl: Add DDI Buffer translation tables for Cannonlake
` [PATCH 39/67] drm/i915/cnl: Implement voltage swing sequence
` [PATCH 40/67] drm/i915/cnl: Enable loadgen_select bit for vswing sequence
` [PATCH 41/67] drm/i915/cnl: Add slice and subslice information to debugfs
` [PATCH 42/67] drm/i915/DMC/CNL: Load DMC on CNL
` [PATCH 43/67] drm/i915: Use HAS_CSR instead of gen number on DMC load
` [PATCH 44/67] drm/i915/cnl: DC3 to DC5 counters available on CNL
` [PATCH 45/67] drm/i915/cnl: Add max allowed Cannonlake DC
` [PATCH 46/67] drm/i915/cnl: Add allowed DP rates for Cannonlake
` [PATCH 47/67] drm/i915/cnl: Dump the right pll registers when dumping pipe config
` [PATCH 48/67] drm/i915/cnl: Get DDI clock based on PLLs
` [PATCH 49/67] drm/i915/cnl: Avoid old DDI translation functions on Cannonlake
` [PATCH 50/67] drm/i915/gen10+: use the SKL code for reading WM latencies
` [PATCH 51/67] drm/i915/cnl: Enable SAGV for Cannonlake
` [PATCH 52/67] drm/i915/gen10: fix the gen 10 SAGV block time
` [PATCH 53/67] drm/i915/cnl: don't apply the GEN9/CNL:A WM WAs to CNL:B+
` [PATCH 54/67] drm/i915/gen10: fix WM latency printing
` [PATCH 55/67] drm/i915/gen10: implement gen 10 watermarks calculations
` [PATCH 56/67] drm/i915/cnl: Reuse skl_wm_get_hw_state on Cannonlake
` [PATCH 57/67] x86/gpu: CNL uses the same GMS values as SKL
` [PATCH] "
` [PATCH 58/67] drm/i915/cnl: Cannonlake color init
` [PATCH 59/67] drm/i915/cnl: Fix Cannonlake scaler mode programing
` [PATCH 60/67] drm/i915/cnl: Enable fifo underrun for Cannonlake
` [PATCH 61/67] drm/i915/cnl: Setup PAT Index
` [PATCH 62/67] drm/i915/cnl: Add support slice/subslice/eu configs
` [PATCH 63/67] drm/i915/cnl: Avoid ioremap_wc on Cannonlake as well
` [PATCH 64/67] drm/i915/cnl: WaThrottleEUPerfToAvoidTDBackPressure:cnl(pre-prod)
` [PATCH 65/67] drm/i915/cnl: Enable Audio Pin Buffer
` [PATCH 66/67] drm/i915/cnl: LSPCON support is gen9+
` [PATCH 67/67] drm/i915/cnl: Adjust min pixel rate
` ✗ Fi.CI.BAT: warning for series starting with [01/67] drm/i915/cnp: Introduce Cannonpoint PCH. (rev2)
` ✗ Fi.CI.BAT: warning for series starting with [01/67] drm/i915/cnp: Introduce Cannonpoint PCH. (rev3)
[PATCH] drm/i915/cnl: Wa to ignore VBT alternate pin on B-stepping
2017-04-07 1:14 UTC (2+ messages)
` ✗ Fi.CI.BAT: failure for "
[PATCH] drm/i915/guc: write wopcm related register once during uc init
2017-04-07 0:39 UTC (2+ messages)
` ✓ Fi.CI.BAT: success for "
[Intel-gfx] [BUG][REGRESSION] i915 gpu hangs under load
2017-04-06 23:23 UTC (7+ messages)
` [PATCH 0/5] "
` [PATCH 1/5] i915: avoid kernel hang caused by synchronize rcu struct_mutex deadlock
` [PATCH 2/5] i915: flush gem obj freeing workqueues to add accuracy to the i915 shrinker
` [PATCH 3/5] i915: initialize the free_list of the fencing atomic_helper
` [PATCH 4/5] i915: schedule while freeing the lists of gem objects
` [PATCH 5/5] i915: fence workqueue optimization
[PATCH v4 00/11] drm/i915/dp: rest of refactoring, link rate fallback
2017-04-06 21:54 UTC (21+ messages)
` [PATCH v4 01/11] drm/i915/dp: use the sink rates array for max sink rates
` [PATCH v4 02/11] drm/i915/dp: cache common rates with "
` [PATCH v4 03/11] drm/i915/dp: do not limit rate seek when not needed
` [PATCH v4 04/11] drm/i915/dp: don't call the link parameters sink parameters
` [PATCH v4 05/11] drm/i915/dp: add functions for max common link rate and lane count
` [PATCH v4 06/11] drm/i915/mst: use max link not sink "
` [PATCH v4 07/11] drm/i915/dp: localize link rate index variable more
` [PATCH v4 08/11] drm/i915/dp: use readb and writeb calls for single byte DPCD access
` [PATCH v4 09/11] drm/i915/dp: read sink count to a temporary variable first
` [PATCH v4 10/11] drm/i915/dp: Validate cached link rate and lane count before retraining
` [PATCH v5] "
` [PATCH v6] "
` [PATCH v4 11/11] drm/i915: Implement Link Rate fallback on Link training failure
` ✓ Fi.CI.BAT: success for drm/i915/dp: rest of refactoring, link rate fallback
` ✗ Fi.CI.BAT: failure for drm/i915/dp: rest of refactoring, link rate fallback (rev2)
` ✓ Fi.CI.BAT: success for drm/i915/dp: rest of refactoring, link rate fallback (rev3)
[PATCH v3] drm: Add DPCD definitions for DP 1.4 DSC feature
2017-04-06 21:37 UTC (3+ messages)
` [PATCH v4] "
[PATCH 0/4] drm/atomic: Cleanups for adding connector atomic check function
2017-04-06 21:04 UTC (4+ messages)
` ✓ Fi.CI.BAT: success for "
[PATCH 0/5] Classify the engines in class + instance (v2)
2017-04-06 20:40 UTC (13+ messages)
` [PATCH 1/5] drm/i915: Classify the engines in class + instance
` [PATCH 2/5] drm/i915: Use the same vfunc for BSD2 ring init
` [PATCH 3/5] drm/i915: Generate the engine name based on the instance number
` [PATCH v3] "
` [PATCH 4/5] drm/i915: Split the engine info table in two levels, using class + instance
` [PATCH 5/5] drm/i915: Use the engine class to get the context size
` ✓ Fi.CI.BAT: success for Classify the engines in class + instance (rev2)
` ✗ Fi.CI.BAT: failure for Classify the engines in class + instance (rev3)
[PATCH i-g-t v1] igt_kms: Allow pipes with no cursor plane
2017-04-06 19:18 UTC
[PATCH] drm/atomic: Acquire connection_mutex lock in drm_helper_probe_single_connector_modes, v4
2017-04-06 19:15 UTC (2+ messages)
` ✓ Fi.CI.BAT: success for "
[PATCH 0/5] Classify the engines in class + instance
2017-04-06 18:44 UTC (16+ messages)
` [PATCH 1/5] drm/i915: "
` [PATCH 2/5] drm/i915: Use the same vfunc for BSD2 ring init
` [PATCH 3/5] drm/i915: Generate the engine name based on the instance number
` [PATCH 4/5] drm/i915: Split the engine info table in two levels, using class + instance
` [PATCH 5/5] drm/i915: Use the engine class to get the context size
[PATCH 00/15] acquire ctx wire-up, part 2
2017-04-06 18:00 UTC (4+ messages)
` [PATCH 12/15] drm: Add acquire ctx to ->gamma_set hook
[PATCH v3] drm/i915: Only report a wakeup if the waiter was truly asleep
2017-04-06 17:40 UTC (2+ messages)
[PATCH v3 0/7] Enable OA unit for Gen 8 and 9 in i915 perf
2017-04-06 16:56 UTC (3+ messages)
` [PATCH v3 4/7] drm/i915/perf: Add OA unit support for Gen 8+
[PATCH 1/2] drm/i915: Move the GTFIFODBG to the common mmio dbg framework
2017-04-06 16:25 UTC (5+ messages)
[PATCH 1/2] drm/i915: Move the GTFIFODBG to the common mmio dbg framework
2017-04-06 16:24 UTC (6+ messages)
` ✗ Fi.CI.BAT: warning for series starting with [1/2] "
` ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915: Move the GTFIFODBG to the common mmio dbg framework (rev2)
` ✗ Fi.CI.BAT: failure for series starting with [1/2] drm/i915: Move the GTFIFODBG to the common mmio dbg framework (rev3)
[PATCH 2/2] drm/i915: Use wait_for_atomic_us when waiting for gt fifo
2017-04-06 15:46 UTC (3+ messages)
[PATCH 0/2] drm/i915/scheduler: add gvt force-single-submission and notification for guc
2017-04-06 15:19 UTC (8+ messages)
` [PATCH v2 2/2] drm/i915/scheduler: add gvt "
[PATCH] drm/i915: Use the right mapping_gfp_mask for final shmem allocation
2017-04-06 12:10 UTC (3+ messages)
[maintainer-tools PATCH v2 2/2] dim: Curate and insert tags into patch(es)
2017-04-06 11:50 UTC (2+ messages)
[PATCH] drm/i915/glk: limit pixel clock to 99% of cdclk workaround
2017-04-06 11:47 UTC (2+ messages)
[PATCH v3 00/14] drm/i915/dp: link rate and lane count refactoring
2017-04-06 11:41 UTC (4+ messages)
` [PATCH v3 05/14] drm/i915/dp: generate and cache sink rate array for all DP, not just eDP 1.4
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