messages from 2018-11-02 13:45:37 to 2018-11-05 09:35:25 UTC [more...]
[v2 0/2] Add Colorspace connector property interface
2018-11-05 9:35 UTC (16+ messages)
` [v2 1/2] drm: Add colorspace property
` [Intel-gfx] "
` [v2 2/2] drm/i915: Attach colorspace property and enable modeset
` [Intel-gfx] "
[PATCH 1/3] drm/atomic: Use explicit old crtc state in drm_atomic_add_affected_planes()
2018-11-05 9:33 UTC (6+ messages)
` [PATCH 2/3] drm/atomic: Use explicit old/new state in drm_atomic_crtc_check()
` [PATCH 3/3] drm/atomic: Use explicit old/new state in drm_atomic_plane_check()
[PATCH v10 00/15] drm/i915/icl: dsi enabling
2018-11-05 9:32 UTC (7+ messages)
` ✗ Fi.CI.BAT: failure for drm/i915/icl: dsi enabling (rev5)
X freezes for a second or every now and then when lid closed
2018-11-05 6:03 UTC (6+ messages)
[PATCH v4 2/2] HAX: Enable GuC for CI
2018-11-05 0:23 UTC (2+ messages)
` [LKP] [HAX] ddc7f46e1c: drm:i915_gem_init_hw[i915]]
[PATCH 01/16] drm/i915: Properly set PCH as NOP when display is disabled
2018-11-03 21:41 UTC (2+ messages)
[CI 01/19] drm/dsc: Define Display Stream Compression PPS infoframe
2018-11-03 5:45 UTC (23+ messages)
` [CI 02/19] drm/dsc: Define VESA Display Stream Compression Capabilities
` [CI 03/19] drm/dsc: Define Rate Control values that do not change over configurations
` [CI 04/19] drm/dsc: Add helpers for DSC picture parameter set infoframes
` [CI 05/19] drm/dsc: Define the DSC 1.1 and 1.2 Line Buffer depth constants
` [CI 06/19] drm/i915/dp: Add DSC params and DSC config to intel_crtc_state
` [CI 07/19] drm/i915/dp: Compute DSC pipe config in atomic check
` [CI 08/19] drm/i915/dp: Do not enable PSR2 if DSC is enabled
` [CI 09/19] drm/i915/dsc: Define & Compute VESA DSC params
` [CI 10/19] drm/i915/dsc: Compute Rate Control parameters for DSC
` [CI 11/19] drm/i915/dp: Enable/Disable DSC in DP Sink
` [CI 12/19] drm/i915/dsc: Add a power domain for VDSC on eDP/MIPI DSI
` [CI 13/19] drm/i915/dp: Configure i915 Picture parameter Set registers during DSC enabling
` [CI 14/19] drm/i915/dp: Use the existing write_infoframe() for DSC PPS SDPs
` [CI 15/19] drm/i915/dp: Populate DSC PPS SDP and send PPS infoframes
` [CI 16/19] drm/i915/dp: Configure Display stream splitter registers during DSC enable
` [CI 17/19] drm/i915/dp: Disable DSC in source by disabling DSS CTL bits
` [CI 18/19] drm/i915/dsc: Enable and disable appropriate power wells for VDSC
` [CI 19/19] drm/i915/dsc: Add Per connector debugfs node for DSC support/enable
` ✗ Fi.CI.CHECKPATCH: warning for series starting with [CI,01/19] drm/dsc: Define Display Stream Compression PPS infoframe
` ✗ Fi.CI.SPARSE: "
` ✓ Fi.CI.BAT: success "
` ✓ Fi.CI.IGT: "
[PATCH v3 0/5] drm/i915: HPD IRQ storm detection fixes
2018-11-03 4:18 UTC (9+ messages)
` [PATCH v3 1/5] drm/i915: Fix possible race in intel_dp_add_mst_connector()
` [PATCH v3 2/5] drm/i915: Fix NULL deref when re-enabling HPD IRQs on systems with MST
` [PATCH v3 3/5] drm/i915: Fix threshold check in intel_hpd_irq_storm_detect()
` [PATCH v3 4/5] drm/i915: Clarify flow for disabling IRQs on storms
` [PATCH v3 5/5] drm/i915: Add short HPD IRQ storm detection for non-MST systems
` ✗ Fi.CI.SPARSE: warning for drm/i915: HPD IRQ storm detection fixes (rev3)
` ✓ Fi.CI.BAT: success "
` ✓ Fi.CI.IGT: "
[v3 0/7] Forward Error Correction
2018-11-03 3:44 UTC (8+ messages)
` [v4 6/7] i915/dp/fec: Configure the Forward Error Correction bits
` [v4 7/7] drm/i915/fec: Disable FEC state
[PATCH v8 00/19] DSC enabling remaining patches respin
2018-11-03 2:40 UTC (25+ messages)
` [PATCH v8 01/19] drm/dsc: Define Display Stream Compression PPS infoframe
` [PATCH v8 02/19] drm/dsc: Define VESA Display Stream Compression Capabilities
` [PATCH v8 03/19] drm/dsc: Define Rate Control values that do not change over configurations
` [PATCH v8 04/19] drm/dsc: Add helpers for DSC picture parameter set infoframes
` [PATCH v8 05/19] drm/dsc: Define the DSC 1.1 and 1.2 Line Buffer depth constants
` [PATCH v8 06/19] drm/i915/dp: Add DSC params and DSC config to intel_crtc_state
` [PATCH v8 07/19] drm/i915/dp: Compute DSC pipe config in atomic check
` [PATCH v8 08/19] drm/i915/dp: Do not enable PSR2 if DSC is enabled
` [PATCH v8 09/19] drm/i915/dsc: Define & Compute VESA DSC params
` [PATCH v8 10/19] drm/i915/dsc: Compute Rate Control parameters for DSC
` [PATCH v8 11/19] drm/i915/dp: Enable/Disable DSC in DP Sink
` [PATCH v8 12/19] drm/i915/dsc: Add a power domain for VDSC on eDP/MIPI DSI
` [PATCH v8 13/19] drm/i915/dp: Configure i915 Picture parameter Set registers during DSC enabling
` [PATCH v8 14/19] drm/i915/dp: Use the existing write_infoframe() for DSC PPS SDPs
` [PATCH v8 15/19] drm/i915/dp: Populate DSC PPS SDP and send PPS infoframes
` [PATCH v8 16/19] drm/i915/dp: Configure Display stream splitter registers during DSC enable
` [PATCH v8 17/19] drm/i915/dp: Disable DSC in source by disabling DSS CTL bits
` [PATCH v8 18/19] drm/i915/dsc: Enable and disable appropriate power wells for VDSC
` [PATCH v8 19/19] drm/i915/dsc: Add Per connector debugfs node for DSC support/enable
` ✗ Fi.CI.CHECKPATCH: warning for DSC enabling remaining patches respin
` ✗ Fi.CI.SPARSE: "
` ✗ Fi.CI.BAT: failure "
[PATCH 0/2] drm/i915/icl: Fix suspend/resume for TypeC HDMI
2018-11-03 0:45 UTC (9+ messages)
` [PATCH 1/2] drm/i915/icl: Configure MG PHY gating for HDMI ports too
` [PATCH 2/2] drm/i915/icl: Configure MG DP mode "
` ✗ Fi.CI.SPARSE: warning for drm/i915/icl: Fix suspend/resume for TypeC HDMI
` ✓ Fi.CI.BAT: success "
` ✗ Fi.CI.IGT: failure "
[PATCH] drm/i915/icl: Fix power well 2 wrt. DC-off toggling order
2018-11-02 23:54 UTC (3+ messages)
` ✓ Fi.CI.BAT: success for "
` ✓ Fi.CI.IGT: "
[PATCH 1/4] drm/i915: Reuse the aux_domain cached
2018-11-02 23:41 UTC (11+ messages)
` [PATCH 2/4] drm/i915: Release DDI power well references in MST ports
` [PATCH 3/4] drm/i915/icl: Only grab TC ports when using it
` [PATCH 4/4] drm/i915/icl: Delay hotplug processing for tc ports
` ✗ Fi.CI.SPARSE: warning for series starting with [1/4] drm/i915: Reuse the aux_domain cached
` ✗ Fi.CI.BAT: failure "
[PATCH 0/5] drm/i915/icl: Fix combo PHY HW context loss
2018-11-02 23:02 UTC (22+ messages)
` [PATCH 1/5] drm/i915/icl: Fix combo PHY uninit
` [PATCH 2/5] drm/i915/cnl+: Move the combo PHY init/uninit code to a new file
` [PATCH 3/5] drm/i915/cnl+: Verify combo PHY HW state during PHY uninit
` [PATCH 4/5] drm/i915/icl: Skip init for an already enabled combo PHY
` [PATCH 5/5] drm/i915/icl: Fix port B combo PHY context loss after DC transitions
` ✗ Fi.CI.CHECKPATCH: warning for drm/i915/icl: Fix combo PHY HW context loss
` ✗ Fi.CI.SPARSE: "
` ✓ Fi.CI.BAT: success "
` ✓ Fi.CI.IGT: "
[PATCH 0/5] Make GEN macros more similar
2018-11-02 22:47 UTC (9+ messages)
` [PATCH 3/5] drm/i915: merge gen checks to use range
[PATCH 1/3] drm/lease: debug output for lease creation
2018-11-02 22:37 UTC (11+ messages)
` [PATCH 2/3] drm/file: Uncompact the feature flags
` [PATCH 3/3] drm/lease: look at ->universal_planes only once
` [PATCH] "
` ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/3] drm/lease: debug output for lease creation
` ✓ Fi.CI.BAT: success "
` ✓ Fi.CI.IGT: "
` ✗ Fi.CI.BAT: failure for series starting with [1/3] drm/lease: debug output for lease creation (rev2)
[PATCH 01/25] RFT drm/i915/execlists: Flush memory before signaling ELSQ
2018-11-02 21:21 UTC (32+ messages)
` [PATCH 02/25] drm/i915: Mark pin flags as u64
` [Intel-gfx] "
` [PATCH 03/25] drm/i915/selftests: Verify we can perform resets from atomic context
` [PATCH 04/25] drm/i915/userptr: Avoid struct_mutex recursion for mmu_invalidate_range_start
` [PATCH 05/25] drm/i915: Prevent machine hang from Broxton's vtd w/a and error capture
` [PATCH 06/25] drm/i915: Always try to reset the GPU on takeover
` [PATCH 07/25] drm/i915: Cache the error string
` [PATCH 08/25] drm/i915: Report the number of closed vma held by each context in debugfs
` [PATCH 09/25] drm/i915: Remove debugfs/i915_ppgtt_info
` [PATCH 10/25] drm/i915: Track all held rpm wakerefs
` [PATCH 11/25] drm/i915: Markup paired operations on wakerefs
` [PATCH 12/25] drm/i915: Syntatic sugar for using intel_runtime_pm
` [PATCH 13/25] drm/i915: Markup paired operations on display power domains
` [PATCH 14/25] drm/i915: Track the wakeref used to initialise "
` [PATCH 15/25] drm/i915: Combined gt.awake/gt.power wakerefs
` [PATCH 16/25] drm/i915/dp: Markup pps lock power well
` [PATCH 17/25] drm/i915: Complain if hsw_get_pipe_config acquires the same power well twice
` [PATCH 18/25] drm/i915: Mark up Ironlake ips with rpm wakerefs
` [PATCH 19/25] drm/i915: Serialise concurrent calls to i915_gem_set_wedged()
` [PATCH 20/25] drm/i915: Differentiate between ggtt->mutex and ppgtt->mutex
` [PATCH 21/25] drm/i915: Pull all the reset functionality together into i915_reset.c
` [PATCH 22/25] drm/i915: Make all GPU resets atomic
` [PATCH 23/25] drm/i915/guc: Disable global reset
` [PATCH 24/25] drm/i915: Perform device reset under stop-machine
` [PATCH 25/25] drm/i915: Remove GPU reset dependence on struct_mutex
` ✗ Fi.CI.CHECKPATCH: warning for series starting with [01/25] RFT drm/i915/execlists: Flush memory before signaling ELSQ
` ✗ Fi.CI.SPARSE: "
` ✓ Fi.CI.BAT: success "
` ✗ Fi.CI.IGT: failure "
[PATCH v7 00/19] DSC enabling remaining patches
2018-11-02 21:07 UTC (18+ messages)
` [PATCH v7 06/19] drm/i915/dp: Compute DSC pipe config in atomic check
` [PATCH v7 07/19] drm/i915/dp: Do not enable PSR2 if DSC is enabled
` [PATCH v7 09/19] drm/i915/dsc: Define & Compute VESA DSC params
` [PATCH v7 10/19] drm/i915/dsc: Compute Rate Control parameters for DSC
` [PATCH v7 13/19] drm/i915/dp: Configure i915 Picture parameter Set registers during DSC enabling
` [PATCH v7 18/19] drm/i915/dsc: Enable and disable appropriate power wells for VDSC
` ✗ Fi.CI.BAT: failure for DSC enabling remaining patches
[PATCH v2 0/3] drm/i915: HPD IRQ storm detection fixes
2018-11-02 20:41 UTC (5+ messages)
` [PATCH v2 2/3] drm/i915: Fix NULL deref when re-enabling HPD IRQs on systems with MST
` [PATCH v2 3/3] drm/i915: Add short HPD IRQ storm detection for non-MST systems
[PATCH v1] drm/i915: GTT offset is cut by 32b-flag
2018-11-02 19:43 UTC (8+ messages)
` ✗ Fi.CI.CHECKPATCH: warning for "
` ✓ Fi.CI.BAT: success "
` ✓ Fi.CI.IGT: "
[PATCH v3] mm, drm/i915: mark pinned shmemfs pages as unevictable
2018-11-02 18:26 UTC (13+ messages)
[PATCH] drm/i915/fia: FIA registers offset implementation
2018-11-02 17:44 UTC (2+ messages)
[PATCH 1/2] ALSA: x86: Fix runtime PM for hdmi-lpe-audio
2018-11-02 16:20 UTC (4+ messages)
[PATCH v14 2/2] drm/i915: Allow "max bpc" property to limit pipe_bpp
2018-11-02 16:18 UTC (4+ messages)
` [PATCH v15 "
[PATCH] drm/i915: intel_pipe_config_compare: Don't compare DSI PLL regs when adjusting
2018-11-02 14:16 UTC (2+ messages)
` ✓ Fi.CI.IGT: success for "
page: next (older) | prev (newer) | latest
- recent:[subjects (threaded)|topics (new)|topics (active)]
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox