messages from 2019-09-13 18:37:06 to 2019-09-17 11:06:18 UTC [more...]
[PATCH] drm/i915/tgl: Extend MI_SEMAPHORE_WAIT
2019-09-17 11:06 UTC (4+ messages)
` ✗ Fi.CI.BUILD: failure for drm/i915/tgl: Extend MI_SEMAPHORE_WAIT (rev2)
[PATCH v4 1/2] drm/i915/display/icl: Bump up the hdisplay and vdisplay as per transcoder limits
2019-09-17 10:55 UTC (6+ messages)
[PATCH] drm/i915: fix SFC reset flow
2019-09-17 10:22 UTC (5+ messages)
` ✓ Fi.CI.BAT: success for "
` ✓ Fi.CI.IGT: "
[RFC PATCH 0/2] Mdev: support mutiple kinds of devices
2019-09-17 10:16 UTC (7+ messages)
` [RFC PATCH 1/2] mdev: device id support
` [RFC PATCH 2/2] mdev: introduce device specific ops
[PATCH v10 0/9] i915 vgpu PV to improve vgpu performance
2019-09-17 9:55 UTC (16+ messages)
` [PATCH v10 1/9] drm/i915: introduced vgpu pv capability
` [PATCH v10 2/9] drm/i915: vgpu shared memory setup for pv optimization
` [PATCH v10 3/9] drm/i915: vgpu pv command buffer support
` [PATCH v10 4/9] drm/i915: vgpu ppgtt update pv optimization
` [PATCH v10 5/9] drm/i915: vgpu context submission "
` [PATCH v10 6/9] drm/i915/gvt: GVTg handle pv_caps PVINFO register
` [PATCH v10 7/9] drm/i915/gvt: GVTg handle shared_page setup
` [PATCH v10 8/9] drm/i915/gvt: GVTg support ppgtt pv optimization
` [PATCH v10 9/9] drm/i915/gvt: GVTg support context submission "
` ✗ Fi.CI.CHECKPATCH: warning for i915 vgpu PV to improve vgpu performance
` ✓ Fi.CI.BAT: success "
` ✓ Fi.CI.IGT: "
[PATCH v6 00/10] DSB enablement
2019-09-17 9:19 UTC (11+ messages)
` [PATCH v6 07/10] drm/i915/dsb: function to trigger workload execution of DSB
` [PATCH v6 08/10] drm/i915/dsb: Enable gamma lut programming using DSB
[PATCH] drm/i915: Only apply a rmw mmio update if the value changes
2019-09-17 8:37 UTC (2+ messages)
` ✓ Fi.CI.BAT: success for "
[PATCH i-g-t] 915/gem_exec_faulting_reloc: Uses the blitter; require the blitter
2019-09-17 8:27 UTC (2+ messages)
` [igt-dev] "
[PATCH] drm/i915: Lock signaler timeline while navigating
2019-09-17 8:15 UTC (2+ messages)
` ✓ Fi.CI.BAT: success for "
[PATCH] drm: Handle connector tile support only for modes that match tile size
2019-09-17 8:13 UTC (3+ messages)
` ✓ Fi.CI.BAT: success for "
` ✓ Fi.CI.IGT: "
[PATCH] drm/i915/cml: Add second PCH ID for CMP
2019-09-17 7:22 UTC (7+ messages)
` ✗ Fi.CI.CHECKPATCH: warning for "
` ✓ Fi.CI.BAT: success "
` ✓ Fi.CI.IGT: "
[PATCH 0/3] drm/i915/perf: Enable non-power-of-2 OA report sizes
2019-09-17 4:11 UTC (13+ messages)
` [PATCH 1/3] drm/i915/perf: rework aging tail workaround
` [PATCH 2/3] drm/i915/perf: Add support for report sizes that are not power of 2
` [PATCH 3/3] drm/i915/perf: Add the report format with a non-power-of-2 size
` ✗ Fi.CI.CHECKPATCH: warning for drm/i915/perf: Enable non-power-of-2 OA report sizes
` ✓ Fi.CI.BAT: success "
` ✓ Fi.CI.IGT: "
[PATCH] drm/i915: Adding YUV444 packed format support for skl+
2019-09-17 0:38 UTC (4+ messages)
` ✗ Fi.CI.CHECKPATCH: warning for "
` ✓ Fi.CI.BAT: success "
` ✗ Fi.CI.IGT: failure "
[PATCH v2] drm/i915/guc: Enable guc logging on guc log relay write
2019-09-16 23:52 UTC (2+ messages)
` ✗ Fi.CI.BAT: failure for drm/i915/guc: Enable guc logging on guc log relay write (rev3)
[PATCH CI 1/2] drm/connector: Share with non-atomic drivers the function to get the single encoder
2019-09-16 22:31 UTC (10+ messages)
` [PATCH CI 2/2] drm/connector: Allow max possible encoders to attach to a connector
` ✗ Fi.CI.CHECKPATCH: warning for series starting with [CI,1/2] drm/connector: Share with non-atomic drivers the function to get the single encoder
` ✗ Fi.CI.SPARSE: "
` ✓ Fi.CI.BAT: success "
` ✓ Fi.CI.IGT: "
` [Intel-gfx] "
[PATCH] drm/i915/tgl: Suspend pre-parser across GTT invalidations
2019-09-16 21:21 UTC (6+ messages)
` ✓ Fi.CI.BAT: success for "
` ✗ Fi.CI.IGT: failure "
[PATCH 00/19] drm/i915: Plane cdclk requirements and fp16 for gen4+
2019-09-16 20:01 UTC (3+ messages)
` [PATCH 15/19] drm/i915: Simplify skl_max_scale()
[PATCH 1/2] dma-fence: Serialise signal enabling (dma_fence_enable_sw_signaling)
2019-09-16 19:45 UTC (6+ messages)
` [PATCH 2/2] drm/mm: Pack allocated/scanned boolean into a bitfield
` ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/2] dma-fence: Serialise signal enabling (dma_fence_enable_sw_signaling)
` ✓ Fi.CI.BAT: success "
` ✓ Fi.CI.IGT: "
[RESEND] drm/i915: stop conflating HAS_DISPLAY() and disabled display
2019-09-16 18:22 UTC (9+ messages)
` ✓ Fi.CI.BAT: success for "
` ✓ Fi.CI.IGT: "
[PATCH 1/2] drm/i915: Show the logical context ring state on dumping
2019-09-16 17:32 UTC (6+ messages)
` [PATCH 2/2] drm/i915/selftests: Verify the LRC register layout between init and HW
` ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/2] drm/i915: Show the logical context ring state on dumping
` ✓ Fi.CI.BAT: success "
` ✓ Fi.CI.IGT: "
[PATCH v8 0/7] DC3CO Support for TGL
2019-09-16 13:25 UTC (6+ messages)
` [PATCH v8 1/7] drm/i915/tgl: Add DC3CO required register and bits
` [PATCH v8 2/7] drm/i915/tgl: Add DC3CO mask to allowed_dc_mask and gen9_dc_mask
` ✓ Fi.CI.IGT: success for DC3CO Support for TGL (rev9)
[PATCH 0/9] drm/print: add and use drm_debug_enabled()
2019-09-16 13:23 UTC (9+ messages)
` [PATCH 2/9] drm/print: add drm_debug_enabled()
` [PATCH 6/9] drm/msm: use drm_debug_enabled() to check for debug categories
` ✓ Fi.CI.IGT: success for drm/print: add and use drm_debug_enabled()
[PATCH i-g-t] igt/kms_frontbuffer_tracking: Skip over IGT_DRAW_BLT when there's no BLT
2019-09-16 13:09 UTC (3+ messages)
` [igt-dev] "
drivers/gpu/drm/i915/display/intel_display.c:3934 skl_plane_stride() error: testing array offset 'color_plane' after use
2019-09-16 12:43 UTC (3+ messages)
Dynamic DMA-buf locking changes
2019-09-16 12:23 UTC (5+ messages)
` [PATCH 1/4] dma-buf: change DMA-buf locking convention
[PATCH] drm/i915: Verify the engine after acquiring the active.lock
2019-09-16 12:11 UTC (3+ messages)
` ✗ Fi.CI.CHECKPATCH: warning for "
` ✗ Fi.CI.BAT: failure "
[PATCH v8 0/7] drm/i915/dp: Support for DP HDR outputs
2019-09-16 11:55 UTC (10+ messages)
` [PATCH v8 1/7] drm/i915/dp: Extend program of VSC Header and DB for Colorimetry Format
` [PATCH v8 2/7] drm/i915/dp: Add support of BT.2020 Colorimetry to DP MSA
` [PATCH v8 3/7] drm: Add DisplayPort colorspace property
` [PATCH v8 4/7] drm/i915/dp: Attach "
` [PATCH v8 5/7] drm/i915: Add new GMP register size for GEN11
` [PATCH v8 6/7] drm/i915/dp: Program an Infoframe SDP Header and DB for HDR Static Metadata
` [PATCH v8 7/7] drm/i915/dp: Attach HDR metadata property to DP connector
` ✓ Fi.CI.BAT: success for drm/i915/dp: Support for DP HDR outputs (rev8)
` ✓ Fi.CI.IGT: "
[PATCH 01/21] drm/i915: Restrict the aliasing-ppgtt to the size of the ggtt
2019-09-16 11:10 UTC (4+ messages)
` [PATCH 13/21] drm/i915: Pull i915_vma_pin under the vm->mutex
[PATCH 00/14] TGL TC enabling
2019-09-16 8:48 UTC (25+ messages)
` [PATCH 01/14] drm/i915/tgl: Add missing ddi clock select during DP init sequence
` [PATCH 02/14] drm/i915/tgl: TC helper function to return pin mapping
` [PATCH 03/14] drm/i915/tgl: Finish modular FIA support on registers
` [PATCH 04/14] drm/i915/tgl: Fix driver crash when update_active_dpll is called
` [PATCH 05/14] drm/i915/tgl: Add dkl phy registers
` [PATCH 06/14] drm/i915/tgl: Add initial dkl pll support
` [PATCH 07/14] drm/i915/tgl: Add support for dkl pll write
` [PATCH 08/14] drm/i915/tgl: Add dkl phy programming sequences
` [PATCH 09/14] drm/i915/icl: Unify disable and enable phy clock gating functions
` [PATCH 10/14] drm/i915/tgl: Fix dkl phy register space addressing
` [PATCH 11/14] drm/i915/tgl: Check the UC health of tc controllers after power on
` [PATCH 12/14] drm/i915: Add dkl phy pll calculations
` [PATCH 13/14] drm/i915/tgl: Use dkl pll hardcoded values
` [PATCH 14/14] drm/i915/tgl: initialize TC and TBT ports
` ✗ Fi.CI.CHECKPATCH: warning for TGL TC enabling
` ✓ Fi.CI.BAT: success "
` ✓ Fi.CI.IGT: "
[PATCH] drm/i915/selftests: Exercise CS TLB invalidation
2019-09-16 8:42 UTC (4+ messages)
` ✗ Fi.CI.CHECKPATCH: warning for "
` ✓ Fi.CI.BAT: success "
` ✓ Fi.CI.IGT: "
[PATCH v2] drm/i915: introduce INTEL_DISPLAY_ENABLED()
2019-09-16 7:32 UTC (3+ messages)
` ✓ Fi.CI.IGT: success for drm/i915: introduce INTEL_DISPLAY_ENABLED() (rev2)
[PATCH v7 0/7] drm/i915/dp: Support for DP HDR outputs
2019-09-16 7:10 UTC (4+ messages)
` [PATCH v7 3/7] drm: Add DisplayPort colorspace property
[PATCH v6 00/17] drm/ttm: make ttm bo a gem bo subclass
2019-09-16 4:45 UTC (11+ messages)
` [PATCH v6 08/17] drm/ttm: use gem vma_node
` [Intel-gfx] "
` [Nouveau] "
[PATCH i-g-t] i915: More gem_require_blitter()
2019-09-15 9:26 UTC
[CI] drm/i915/tgl: Re-enable rc6
2019-09-15 2:30 UTC (4+ messages)
` ✓ Fi.CI.BAT: success for "
` ✓ Fi.CI.IGT: "
[PATCH 0/4] drm/i915: Extracts from plane min cdclk/fp16 series
2019-09-15 1:39 UTC (7+ messages)
` [PATCH 1/4] drm/i915: Replace is_planar_yuv_format() with drm_format_info_is_yuv_semiplanar()
` [PATCH 2/4] drm/i915: Allow downscale factor of <3.0 on glk+ for all formats
` [PATCH 3/4] drm/i915: Extract intel_modeset_calc_cdclk()
` [PATCH 4/4] drm/i915: s/pipe_config/crtc_state/ in intel_crtc_atomic_check()
` ✓ Fi.CI.BAT: success for drm/i915: Extracts from plane min cdclk/fp16 series
` ✓ Fi.CI.IGT: "
[CI 1/2] drm/i915/uc: Update HuC firmware naming convention and load latest HuC
2019-09-14 23:06 UTC (5+ messages)
` [CI 2/2] HAX: force enable_guc=2
` ✗ Fi.CI.CHECKPATCH: warning for series starting with [CI,1/2] drm/i915/uc: Update HuC firmware naming convention and load latest HuC
` ✓ Fi.CI.BAT: success "
` ✗ Fi.CI.IGT: failure "
[PATCH 1/2] drm/i915: Show the logical context ring state on dumping
2019-09-14 22:17 UTC (3+ messages)
` ✓ Fi.CI.BAT: success for series starting with [1/2] "
` ✓ Fi.CI.IGT: "
[PATCH] drm/i915/tgl: Enable the blitter ring for basic igt support
2019-09-14 20:34 UTC (2+ messages)
` ✓ Fi.CI.IGT: success for "
[PATCH] drm/i915/tgl: Limit ourselves to just rcs0
2019-09-14 17:08 UTC (2+ messages)
` ✗ Fi.CI.IGT: failure for drm/i915/tgl: Limit ourselves to just rcs0 (rev2)
[PATCH 1/3] drm/i915: Update Gen11 forcewake ranges
2019-09-14 16:15 UTC (5+ messages)
` [PATCH 2/3] drm/i915/tgl: Introduce gen12 "
` ✗ Fi.CI.IGT: failure for series starting with [1/3] drm/i915: Update Gen11 "
[PATCH 1/2] drm/i915/tgl: Introduce gen12 forcewake ranges
2019-09-14 5:18 UTC (2+ messages)
` ✓ Fi.CI.IGT: success for series starting with [1/2] "
[PATCH 1/3] drm/i915/tgl: Introduce gen12 forcewake ranges
2019-09-14 0:08 UTC (2+ messages)
` ✓ Fi.CI.IGT: success for series starting with [1/3] "
[CI] drm/i915/gtt: Make sure the gen6 ppgtt is bound before first use
2019-09-13 23:19 UTC (2+ messages)
` ✓ Fi.CI.IGT: success for drm/i915/gtt: Make sure the gen6 ppgtt is bound before first use (rev3)
[PATCH 1/4] drm/i915/tgl: Add missing ddi clock select during DP init sequence
2019-09-13 22:44 UTC (2+ messages)
i915 firmware updates (CMl- GuC,HuC; TGL-DMC,ICL-DMC, HuC Updates-SKL,BXT,KBL,GLK,ICL)
2019-09-13 22:29 UTC
[PATCH i-g-t 1/4] i915/gem_exec_balancer: Beware the migratory fence
2019-09-13 18:39 UTC (2+ messages)
` [igt-dev] "
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