messages from 2019-10-24 22:36:41 to 2019-10-25 15:39:03 UTC [more...]
[RFC i-g-t 0/1] Per client engine busyness
2019-10-25 15:38 UTC (8+ messages)
` [Intel-gfx] "
` [RFC i-g-t 1/1] intel-gpu-top: Support for client stats
` [Intel-gfx] "
` [igt-dev] "
` [Intel-gfx] "
[CI 1/7] drm/i915: support creating LMEM objects
2019-10-25 15:37 UTC (14+ messages)
` [Intel-gfx] "
` [CI 2/7] drm/i915: setup io-mapping for LMEM
` [Intel-gfx] "
` [CI 3/7] drm/i915/lmem: support kernel mapping
` [Intel-gfx] "
` [CI 4/7] drm/i915/selftests: add write-dword test for LMEM
` [Intel-gfx] "
` [CI 5/7] drm/i915/selftests: extend coverage to include LMEM huge-pages
` [Intel-gfx] "
` [CI 6/7] drm/i915/selftests: prefer random sizes for the huge-GTT-page smoke tests
` [Intel-gfx] "
` [CI 7/7] drm/i915/selftests: add sanity selftest for huge-GTT-pages
` [Intel-gfx] "
[PATCH i-g-t] lib/i915: Use explicit iterator names in for_each_engine()
2019-10-25 15:33 UTC (4+ messages)
` [Intel-gfx] "
[PATCH] drm/i915/dsb: Remove PIN_MAPPABLE from the DSB object VMA
2019-10-25 15:22 UTC (3+ messages)
` [Intel-gfx] "
[RFC 0/5] Per client engine busyness (all aboard the sysfs train!)
2019-10-25 14:49 UTC (20+ messages)
` [Intel-gfx] "
` [RFC 1/5] drm/i915: Track per-context engine busyness
` [Intel-gfx] "
` [RFC 2/5] drm/i915: Expose list of clients in sysfs
` [Intel-gfx] "
` [RFC 3/5] drm/i915: Update client name on context create
` [Intel-gfx] "
` [RFC 4/5] drm/i915: Expose per-engine client busyness
` [Intel-gfx] "
` [RFC 5/5] drm/i915: Add sysfs toggle to enable per-client engine stats
` [Intel-gfx] "
[PATCH v2] kernel-doc: rename the kernel-doc directive 'functions' to 'identifiers'
2019-10-25 14:48 UTC (5+ messages)
` [Intel-gfx] "
[CI 1/7] drm/i915: support creating LMEM objects
2019-10-25 14:45 UTC (7+ messages)
` ✗ Fi.CI.CHECKPATCH: warning for series starting with [CI,1/7] drm/i915: support creating LMEM objects (rev2)
` [Intel-gfx] "
` ✗ Fi.CI.SPARSE: "
` [Intel-gfx] "
` ✓ Fi.CI.BAT: success "
` [Intel-gfx] "
[PATCH v8 0/2] Refactor Gen11+ SAGV support
2019-10-25 14:20 UTC (14+ messages)
` [Intel-gfx] "
` [PATCH v8 1/2] drm/i915: Refactor intel_can_enable_sagv
` [Intel-gfx] "
` [PATCH v8 2/2] drm/i915: Restrict qgv points which don't have enough bandwidth
` [Intel-gfx] "
` ✗ Fi.CI.BUILD: failure for Refactor Gen11+ SAGV support (rev4)
` [Intel-gfx] "
[PATCH] CI: Test revert some of the documentation fixes
2019-10-25 14:15 UTC (4+ messages)
` [Intel-gfx] "
[PATCH 1/2] drm/i915: Encapsulate kconfig constant values inside boolean predicates
2019-10-25 13:59 UTC (4+ messages)
` [Intel-gfx] "
` [PATCH 2/2] drm/i915/selftests: Initialise err in case there are no engines!
` [Intel-gfx] "
[PATCH v2 0/5] Update VSC SDP / HDR Metadata SDP states on pipe updates
2019-10-25 12:55 UTC (12+ messages)
` [Intel-gfx] "
` [PATCH v2 1/5] drm/i915: Add whether or not to enable an each of Video DIP
` [Intel-gfx] "
` [PATCH v2 2/5] drm/i915: Add checking a specific Video DIP is enabled or not
` [Intel-gfx] "
` [PATCH v2 3/5] drm/i915/dp: Stop sending of VSC SDP when it is not needed
` [Intel-gfx] "
` [PATCH v2 4/5] drm/i915/dp: Stop sending of HDR Metadata Infoframe "
` [Intel-gfx] "
` [PATCH v2 5/5] drm/i915/dp: Call dp_vsc_enable() / dp_hdr_metata_enable() on pipe updates
` [Intel-gfx] "
[PATCH] drm/i915: Convert PAT setup to uncore mmio
2019-10-25 12:55 UTC (3+ messages)
` ✗ Fi.CI.IGT: failure for "
` [Intel-gfx] "
[PATCH] drm/i915: Move intel_engine_context_in/out into intel_lrc.c
2019-10-25 12:43 UTC (8+ messages)
` [Intel-gfx] "
` ✓ Fi.CI.BAT: success for "
` [Intel-gfx] "
[PATCH i-g-t] benchmarks/gem_wsim: Cleanup register access on exit
2019-10-25 12:38 UTC (4+ messages)
` [Intel-gfx] "
[PATCH 1/2] drm/i915/cml: Remove unsupport PCI ID
2019-10-25 20:32 UTC (20+ messages)
` [Intel-gfx] "
` ✗ Fi.CI.BUILD: failure for series starting with [1/2] "
` [Intel-gfx] "
` [PATCH 2/2] drm/i915/cml: Separate U sereis pci id from origianl list
` [Intel-gfx] "
` [PATCH v2 "
` [Intel-gfx] "
` [PATCH v2 1/2] commit 'a7b4deeb02b9 ("drm/i915/cml: Add CML PCI IDS)' introduced new PCI ID that CML support. But some sku is not support yet so remove them
` [Intel-gfx] "
` [PATCH] drm/i915/cml: Remove unsupport PCI ID
` [Intel-gfx] "
` [PATCH v4] "
` [Intel-gfx] "
[PATCH] drm/i915: capture aux page table error register
2019-10-25 12:29 UTC (6+ messages)
` [Intel-gfx] "
[PATCH 0/5] Update VSC SDP / HDR Metadata SDP states on pipe updates
2019-10-25 12:19 UTC (5+ messages)
` ✗ Fi.CI.BAT: failure for "
` [Intel-gfx] "
` [Intel-gfx] [PATCH 0/5] "
[PATCH] drm/i915/bios: add compression parameter block definition
2019-10-25 11:54 UTC (3+ messages)
` ✗ Fi.CI.IGT: failure for drm/i915/bios: add compression parameter block definition (rev2)
` [Intel-gfx] "
[PATCH] drm/i915/selftests/blt: add some kthreads into the mix
2019-10-25 11:36 UTC (4+ messages)
` [Intel-gfx] "
[PATCH] drm: Add support for integrated privacy screens
2019-10-25 11:36 UTC (9+ messages)
` ✗ Fi.CI.BUILD: failure for "
` [Intel-gfx] "
` [Intel-gfx] [PATCH] "
[PATCH] drm/i915/selftests: Tweak the default subtest runtime
2019-10-25 11:04 UTC (6+ messages)
` [Intel-gfx] "
` ✓ Fi.CI.BAT: success for "
` [Intel-gfx] "
[PATCH 01/14] drm/i915: Rework watermark readout to use plane api
2019-10-25 10:13 UTC (7+ messages)
` [PATCH 08/14] drm/i915: Complete crtc hw/uapi split, v3
` [Intel-gfx] "
CI testing of persistence and sysfs
2019-10-25 9:10 UTC (11+ messages)
` [PATCH 01/11] drm/i915/gem: Make context persistence optional
` [Intel-gfx] "
` [PATCH 02/11] drm/i915: Put future HW and their uAPIs under STAGING & BROKEN
` [Intel-gfx] "
[RFC 0/1] Add dsi_state in crtc_state
2019-10-25 6:33 UTC (5+ messages)
` [RFC 1/1] drm/i915/dsi: "
` [Intel-gfx] "
[PATCH] drm/i915/selftests: Flush any i915_active callback work as well
2019-10-25 2:39 UTC (3+ messages)
` ✗ Fi.CI.IGT: failure for "
` [Intel-gfx] "
[PATCH V5 0/6] mdev based hardware virtio offloading support
2019-10-25 1:54 UTC (20+ messages)
` [PATCH V5 1/6] mdev: class id support
` [Intel-gfx] "
` [PATCH V5 2/6] modpost: add support for mdev class id
` [Intel-gfx] "
` [PATCH V5 4/6] mdev: introduce virtio device and its device ops
` [Intel-gfx] "
[PATCH] drm/i915/selftests: Flush interrupts before disabling tasklets
2019-10-25 1:42 UTC (3+ messages)
` ✗ Fi.CI.IGT: failure for "
` [Intel-gfx] "
[CI 1/2] drm/i915: Extract GT render power state management
2019-10-25 1:25 UTC (5+ messages)
` ✗ Fi.CI.CHECKPATCH: warning for series starting with [CI,1/2] "
` [Intel-gfx] "
` ✓ Fi.CI.BAT: success "
` [Intel-gfx] "
[PATCH] drm/i915/display/psr: Print in debugfs if PSR is not enabled because of sink
2019-10-25 1:01 UTC (5+ messages)
` ✗ Fi.CI.IGT: failure for "
` [Intel-gfx] "
[PATCH] drm/i915: Catch GTT fault errors for gen11+ planes
2019-10-24 23:49 UTC (4+ messages)
` [Intel-gfx] "
[PATCH] drm/i915: Fix PCH reference clock for FDI on HSW/BDW
2019-10-24 23:35 UTC (3+ messages)
` ✗ Fi.CI.IGT: failure for drm/i915: Fix PCH reference clock for FDI on HSW/BDW (rev2)
` [Intel-gfx] "
[PATCH 1/4] drm/i915: Add is_dgfx to device info
2019-10-24 23:09 UTC (8+ messages)
` [Intel-gfx] "
` ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/4] "
` [Intel-gfx] "
` ✓ Fi.CI.BAT: success "
` [Intel-gfx] "
[PATCH] drm/dp: Add function to parse EDID descriptors for adaptive sync limits
2019-10-24 15:06 UTC (3+ messages)
` [Intel-gfx] "
[PATCH v6 0/2] Refactor Gen11+ SAGV support
2019-10-24 22:45 UTC (4+ messages)
` [PATCH v6 1/2] drm/i915: Refactor intel_can_enable_sagv
` [Intel-gfx] "
[PATCH 1/3] drm/i915: Use _PICK() for CHICKEN_TRANS()
2019-10-24 22:36 UTC (6+ messages)
` [PATCH 2/3] drm/i915: Add CHICKEN_TRANS_D
` [Intel-gfx] "
` [Intel-gfx] [PATCH 1/3] drm/i915: Use _PICK() for CHICKEN_TRANS()
[PATCH 1/2] drm/i915: Remove nonpriv flags when srm/lrm
2019-10-24 22:36 UTC (6+ messages)
` [Intel-gfx] "
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