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 messages from 2019-10-28 12:57:17 to 2019-10-29 00:02:37 UTC [more...]

[PATCH v6 00/10] Clear Color Support for TGL Render Decompression
 2019-10-29  0:02 UTC  (24+ messages)
` [Intel-gfx] "
` [PATCH v6 01/10] drm/framebuffer: Format modifier for Intel Gen-12 render compression
  ` [Intel-gfx] "
` [PATCH v6 02/10] drm/i915: Use intel_tile_height() instead of re-implementing
  ` [Intel-gfx] "
` [PATCH v6 03/10] drm/i915: Move CCS stride alignment W/A inside intel_fb_stride_alignment
  ` [Intel-gfx] "
` [PATCH v6 04/10] drm/i915/tgl: Gen-12 render decompression
  ` [Intel-gfx] "
` [PATCH v6 05/10] drm/i915: Extract framebufer CCS offset checks into a function
  ` [Intel-gfx] "
` [PATCH v6 06/10] drm/framebuffer: Format modifier for Intel Gen-12 media compression
  ` [Intel-gfx] "
` [PATCH v6 07/10] drm/fb: Extend format_info member arrays to handle four planes
  ` [Intel-gfx] "
` [PATCH v6 08/10] Gen-12 display can decompress surfaces compressed by the media engine
  ` [Intel-gfx] "
` [PATCH v6 09/10] drm/framebuffer/tgl: Format modifier for Intel Gen 12 render compression with Clear Color
  ` [Intel-gfx] "
` [PATCH v6 10/10] drm/i915/tgl: Add Clear Color support for TGL Render Decompression
  ` [Intel-gfx] "
` ✗ Fi.CI.CHECKPATCH: warning for Clear Color Support for TGL Render Decompression (rev9)
  ` [Intel-gfx] "

[CI] drm/i915/gem: Limit the blitter sizes to ensure low preemption latency
 2019-10-28 23:56 UTC  (4+ messages)
` [Intel-gfx] "
` ✗ Fi.CI.BAT: failure for drm/i915/gem: Limit the blitter sizes to ensure low preemption latency (rev2)
  ` [Intel-gfx] "

[PATCH] drm/i915: Avoid HPD poll detect triggering a new detect cycle
 2019-10-28 22:42 UTC  (18+ messages)
` ✗ Fi.CI.CHECKPATCH: warning for "
  ` [Intel-gfx] "
` ✓ Fi.CI.BAT: success "
  ` [Intel-gfx] "
  ` [Intel-gfx] [PATCH] "
` [PATCH v2] "
  ` [Intel-gfx] "
` ✗ Fi.CI.BAT: failure for drm/i915: Avoid HPD poll detect triggering a new detect cycle (rev2)
  ` [Intel-gfx] "

[PATCH] drm/i915: Program LUT before intel_color_commit() if LUT was not previously set v2
 2019-10-28 22:38 UTC  (4+ messages)
` [Intel-gfx] "
` ✗ Fi.CI.BAT: failure for drm/i915: Program LUT before intel_color_commit() if LUT was not previously set (rev2)
  ` [Intel-gfx] "

[CI] drm/i915/blt: fixup block_size rounding
 2019-10-28 22:03 UTC  (2+ messages)
` [Intel-gfx] "

[PATCH] drm/i915/blt: fixup block_size rounding
 2019-10-28 21:55 UTC  (2+ messages)
` [Intel-gfx] "

[PATCH] drm/i915: Adding YUV444 packed format support for skl+ (V13)
 2019-10-28 21:29 UTC  (2+ messages)
` [Intel-gfx] "

[PATCH] drm/i915/guc: Skip suspend/resume GuC action on platforms w/o GuC submission
 2019-10-28 21:25 UTC  (2+ messages)
` [Intel-gfx] "

[PATCH] lib/color_encoding: Fix up support for XYUV format
 2019-10-28 21:24 UTC  (2+ messages)
` [Intel-gfx] "

[PATCH] drm/i914/guc: Fix resume on platforms w/o GuC submission but enabled
 2019-10-28 21:25 UTC  (11+ messages)
  ` [Intel-gfx] "

[PATCH] drm/i915/gt: Tidy up rps irq handler to use intel_gt
 2019-10-28 21:09 UTC  (3+ messages)
` ✓ Fi.CI.IGT: success for "
  ` [Intel-gfx] "

[PATCH] drm/i915/tgl: add support to one DP-MST stream
 2019-10-28 20:58 UTC  (10+ messages)
` [Intel-gfx] "
` ✗ Fi.CI.CHECKPATCH: warning for "
  ` [Intel-gfx] "
` ✓ Fi.CI.BAT: success "
  ` [Intel-gfx] "

[PATCH] drm/i915/execlists: Use vfunc to check engine submission mode
 2019-10-28 20:51 UTC  (16+ messages)
` [Intel-gfx] "
` [PATCH v2] "
  ` [Intel-gfx] "
` ✓ Fi.CI.BAT: success for drm/i915/execlists: Use vfunc to check engine submission mode (rev2)
  ` [Intel-gfx] "

[PATCH] drm/i915/blt: fixup block_size rounding
 2019-10-28 20:10 UTC  (8+ messages)
` [Intel-gfx] "
` ✓ Fi.CI.BAT: success for "
  ` [Intel-gfx] "

[PATCH] drm/i915/selftests: Drop global engine lookup for gt selftests
 2019-10-28 20:08 UTC  (3+ messages)
` ✓ Fi.CI.IGT: success for "
  ` [Intel-gfx] "

[PATCH] drm/i915/vbt: Handle generic DTD block
 2019-10-28 19:41 UTC  (3+ messages)
` [PATCH v2] "
  ` [Intel-gfx] "

[PATCH v2 1/5] drm/dsi: clean up DSI data type definitions
 2019-10-28 19:37 UTC  (14+ messages)
` [Intel-gfx] "
` [PATCH v2 2/5] drm/dsi: add missing DSI data types
  ` [Intel-gfx] "
` [PATCH v2 3/5] drm/dsi: add missing DSI DCS commands
  ` [Intel-gfx] "
` [PATCH v2 4/5] drm/dsi: rename MIPI_DCS_SET_PARTIAL_AREA to MIPI_DCS_SET_PARTIAL_ROWS
  ` [Intel-gfx] "
` [PATCH v2 5/5] drm/dsi: add helpers for DSI compression mode and PPS packets
  ` [Intel-gfx] "
` ✗ Fi.CI.CHECKPATCH: warning for series starting with [v2,1/5] drm/dsi: clean up DSI data type definitions
  ` [Intel-gfx] "
` ✓ Fi.CI.BAT: success "
  ` [Intel-gfx] "

[PATCH RESEND 0/8] drm/print: cleanup and new drm_device based logging
 2019-10-28 19:30 UTC  (12+ messages)
` [PATCH RESEND 8/8] drm/print: introduce new struct drm_device based logging macros
    ` [Intel-gfx] "
` ✗ Fi.CI.CHECKPATCH: warning for drm/print: cleanup and new drm_device based logging (rev2)
  ` [Intel-gfx] "
` ✗ Fi.CI.BAT: failure "
  ` [Intel-gfx] "
` ✗ Fi.CI.CHECKPATCH: warning for drm/print: cleanup and new drm_device based logging (rev3)
  ` [Intel-gfx] "
` ✓ Fi.CI.BAT: success "
  ` [Intel-gfx] "

[PATCH v5 09/10] drm/framebuffer/tgl: Format modifier for Intel Gen 12 render compression with Clear Color
 2019-10-28 18:58 UTC  (3+ messages)
` [PATCH v6 10/10] drm/i915/tgl: Add Clear Color supoort for TGL Render Decompression
  ` [Intel-gfx] "

[PATCH] drm/i915: Program LUT before intel_color_commit() if LUT was not previously set
 2019-10-28 18:56 UTC  (6+ messages)
        ` [Intel-gfx] "

[PATCH 1/2] drm/i915/selftests: Initialise ret
 2019-10-28 18:20 UTC  (12+ messages)
` [Intel-gfx] "
` [PATCH 2/2] drm/i915/display: Mark conn as initialised by iterator
  ` [Intel-gfx] "
` ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/2] drm/i915/selftests: Initialise ret
  ` [Intel-gfx] "
` ✓ Fi.CI.BAT: success "
  ` [Intel-gfx] "

[CI] drm/i915/execlists: Simply walk back along request timeline on reset
 2019-10-28 17:53 UTC  (3+ messages)
` ✓ Fi.CI.BAT: success for drm/i915/execlists: Simply walk back along request timeline on reset (rev6)
  ` [Intel-gfx] "

[PATCH xf86-video-intel] sna/video/overlay: Declare support for depth 8 and 30
 2019-10-28 17:52 UTC  (4+ messages)
` [Intel-gfx] "
` ✗ Fi.CI.BUILD: failure for "
  ` [Intel-gfx] "

[CI] drm/i915: Put future HW and their uAPIs under STAGING & BROKEN
 2019-10-28 17:16 UTC  (3+ messages)
` ✓ Fi.CI.IGT: success for "
  ` [Intel-gfx] "

[PATCH] drm/i915/gem: Limit the blitter sizes to ensure low preemption latency
 2019-10-28 16:43 UTC  (3+ messages)
  ` [Intel-gfx] "

[PATCH 0/5] DP AUX updates
 2019-10-28 16:43 UTC  (8+ messages)
` [PATCH 3/5] drm/i915: Add missing AUX channel H & I support
      ` [Intel-gfx] "
` [PATCH 4/5] drm/i915: Provide more information on DP AUX failures
    ` [Intel-gfx] "

[PATCH] drm/i915/selftests: Check a few more fixed locations within the context image
 2019-10-28 16:15 UTC  (3+ messages)
` ✓ Fi.CI.IGT: success for "
  ` [Intel-gfx] "

[PATCH 1/6] drm/i915: Fix i845/i865 cursor width
 2019-10-28 15:57 UTC  (11+ messages)
  ` [Intel-gfx] "
` ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/6] "
  ` [Intel-gfx] "
` ✓ Fi.CI.BAT: success "
  ` [Intel-gfx] "

[RFC PATCH i-g-t v3 0/4] Calculate softpin offsets from actual page size
 2019-10-28 15:53 UTC  (10+ messages)
` [Intel-gfx] "
` [RFC PATCH i-g-t v3 1/4] lib: Move redundant local helpers to lib/
  ` [Intel-gfx] "
` [RFC PATCH i-g-t v3 2/4] lib: Add GEM minimum page size helper
  ` [Intel-gfx] "
` [RFC PATCH i-g-t v3 3/4] tests/gem_exec_reloc: Calculate softpin offsets from actual page size
  ` [Intel-gfx] "
` [RFC PATCH i-g-t v3 4/4] tests/gem_ctx_shared: Calculate object attributs "
  ` [Intel-gfx] "

[PATCH] drm: Add support for integrated privacy screens
 2019-10-25 19:00 UTC  (6+ messages)
        ` [Intel-gfx] "

[PATCH tip/core/rcu 03/10] drivers/gpu: Replace rcu_swap_protected() with rcu_replace()
 2019-10-28 13:40 UTC  (5+ messages)
    ` [Intel-gfx] "

[CI] drm/i915/selftests: Check a few more fixed locations within the context image
 2019-10-28 15:27 UTC  (3+ messages)
` ✓ Fi.CI.BAT: success for drm/i915/selftests: Check a few more fixed locations within the context image (rev2)
  ` [Intel-gfx] "

[PATCH] drm/i915/tgl: Handle AUX interrupts for TC ports
 2019-10-28 15:28 UTC  (4+ messages)
` ✗ Fi.CI.IGT: failure for drm/i915/tgl: Handle AUX interrupts for TC ports (rev2)
    ` [Intel-gfx] "

[PATCH] drm/i915: Collect user engines at driver_register phase
 2019-10-28 15:20 UTC  (3+ messages)
` ✗ Fi.CI.IGT: failure for "
  ` [Intel-gfx] "

[CI] drm/i915/selftests: Measure basic throughput of blit routines
 2019-10-28 14:37 UTC  (3+ messages)
` ✗ Fi.CI.BAT: failure for drm/i915/selftests: Measure basic throughput of blit routines (rev2)
  ` [Intel-gfx] "

[PATCH] drm/i915/execlists: Simply walk back along request timeline on reset
 2019-10-28 13:12 UTC  (3+ messages)
` ✓ Fi.CI.IGT: success for drm/i915/execlists: Simply walk back along request timeline on reset (rev5)
  ` [Intel-gfx] "


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