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 messages from 2019-10-28 20:38:52 to 2019-10-29 10:40:49 UTC [more...]

RFC: Unpinned DMA-buf handling
 2019-10-29 10:40 UTC  (6+ messages)
` [PATCH 1/5] dma-buf: add dynamic DMA-buf handling v14
` [PATCH 2/5] drm/ttm: remove the backing store if no placement is given
` [PATCH 3/5] drm/amdgpu: use allowed_domains for exported DMA-bufs
` [PATCH 4/5] drm/amdgpu: add amdgpu_dma_buf_pin/unpin
` [PATCH 5/5] drm/amdgpu: implement amdgpu_gem_prime_move_notify

[PATCH] drm/i915/display: only include intel_dp_link_training.h where needed
 2019-10-29 10:39 UTC  (2+ messages)
` [Intel-gfx] "

[PATCH 1/7] drm/i915: define i915_ggtt_has_aperture
 2019-10-29 10:37 UTC  (34+ messages)
` [Intel-gfx] "
` [PATCH 2/7] drm/i915: do not map aperture if it is not available
  ` [Intel-gfx] "
` [PATCH 3/7] drm/i915: set num_fence_regs to 0 if there is no aperture
  ` [Intel-gfx] "
` [PATCH 4/7] drm/i915: error capture with no ggtt slot
  ` [Intel-gfx] "
` [PATCH 5/7] drm/i915: Don't try to place HWS in non-existing mappable region
  ` [Intel-gfx] "
` [PATCH 6/7] drm/i915: don't allocate the ring in stolen if we lack aperture
  ` [Intel-gfx] "
` [PATCH 7/7] drm/i915/selftests: check for missing aperture
  ` [Intel-gfx] "
` ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/7] drm/i915: define i915_ggtt_has_aperture
  ` [Intel-gfx] "
` ✗ Fi.CI.SPARSE: "
  ` [Intel-gfx] "
` ✓ Fi.CI.BAT: success "
  ` [Intel-gfx] "

[PATCH 1/9] drm/i915: Expose 10:10:10 XRGB formats on SNB-BDW sprites
 2019-10-29 10:29 UTC  (9+ messages)
` [PATCH 2/9] drm/i915: Expose alpha formats on VLV/CHV primary planes
    ` [Intel-gfx] "
` [PATCH 4/9] drm/i915: Expose C8 on VLV/CHV sprite planes
    ` [Intel-gfx] "
  ` [Intel-gfx] [PATCH 1/9] drm/i915: Expose 10:10:10 XRGB formats on SNB-BDW sprites

[PATCH v2 1/7] drm/i915: define i915_ggtt_has_aperture
 2019-10-29 10:28 UTC  (14+ messages)
` [Intel-gfx] "
` [PATCH v2 2/7] drm/i915: do not map aperture if it is not available
  ` [Intel-gfx] "
` [PATCH v2 3/7] drm/i915: set num_fence_regs to 0 if there is no aperture
  ` [Intel-gfx] "
` [PATCH v2 4/7] drm/i915: error capture with no ggtt slot
  ` [Intel-gfx] "
` [PATCH v2 5/7] drm/i915: Don't try to place HWS in non-existing mappable region
  ` [Intel-gfx] "
` [PATCH v2 6/7] drm/i915: don't allocate the ring in stolen if we lack aperture
  ` [Intel-gfx] "
` [PATCH v2 7/7] drm/i915/selftests: check for missing aperture
  ` [Intel-gfx] "

[PATCH] drm/i915: Avoid HPD poll detect triggering a new detect cycle
 2019-10-29 10:26 UTC  (12+ messages)
` [PATCH v2] "
    ` [Intel-gfx] "
` ✗ Fi.CI.BAT: failure for drm/i915: Avoid HPD poll detect triggering a new detect cycle (rev2)
  ` [Intel-gfx] "
` ✓ Fi.CI.IGT: success for drm/i915: Avoid HPD poll detect triggering a new detect cycle
  ` [Intel-gfx] "

[PATCH 1/4] drm/edid: Make drm_get_cea_aspect_ratio() static
 2019-10-29 10:21 UTC  (7+ messages)
` [PATCH 4/4] drm/edid: Prep for HDMI VIC aspect ratio (WIP)

[RESUBMIT PATCH v2 0/2] drm/i915: Conclude load -> probe naming convention switch
 2019-10-29 10:20 UTC  (6+ messages)
` [Intel-gfx] "
` [RESUBMIT PATCH v2 1/2] drm/i915: Fix i915_inject_load_error() name to read *_probe_*
  ` [Intel-gfx] "
` [RESUBMIT PATCH v2 2/2] drm/i915: Rename "inject_load_failure" module parameter
  ` [Intel-gfx] "

[RESEND PATCH i-g-t v2 0/1] tests/i915_module_load: Use new name of fault injection module parameter
 2019-10-29 10:17 UTC  (4+ messages)
` [Intel-gfx] "
` [RESEND PATCH i-g-t v2 1/1] "
  ` [Intel-gfx] "

[CI] drm/i915/selftests: Check a few more fixed locations within the context image
 2019-10-29 10:18 UTC  (3+ messages)
` ✓ Fi.CI.IGT: success for drm/i915/selftests: Check a few more fixed locations within the context image (rev2)
  ` [Intel-gfx] "

[PATCH 1/6] drm/i915: Fix i845/i865 cursor width
 2019-10-29 10:10 UTC  (3+ messages)
` ✗ Fi.CI.IGT: failure for series starting with [1/6] "
  ` [Intel-gfx] "

[PATCH] drm/i915/dp: Do not switch aux to TBT mode for non-TC ports
 2019-10-29 10:03 UTC  (6+ messages)
` [Intel-gfx] "
` ✗ Fi.CI.BAT: failure for "
  ` [Intel-gfx] "

[PATCH] drm/i915/gt: Make timeslice duration configurable
 2019-10-29  9:54 UTC  (4+ messages)
` [Intel-gfx] "
` ✓ Fi.CI.BAT: success for "
  ` [Intel-gfx] "

[PATCH RESEND 0/8] drm/print: cleanup and new drm_device based logging
 2019-10-29  9:27 UTC  (6+ messages)
` [PATCH RESEND 6/8] drm/print: convert debug category macros into an enum
    ` [Intel-gfx] "

[PATCH v6 1/2] drm/i915/cml: Remove unsupport PCI ID
 2019-10-29 16:04 UTC  (6+ messages)
` ✗ Fi.CI.BUILD: failure for series starting with [v6,1/2] "
  ` [Intel-gfx] "
` [Intel-gfx] [PATCH v6 1/2] "
` [PATCH v6 2/2] drm/i915/cml: Separate U series pci id from origianl list
  ` [Intel-gfx] "

[RFC 0/3] Display uncore
 2019-10-29  9:23 UTC  (3+ messages)
  ` [Intel-gfx] "

[PATCH v2] kernel-doc: rename the kernel-doc directive 'functions' to 'identifiers'
 2019-10-29  8:00 UTC  (11+ messages)
          ` [Intel-gfx] "

[CI 01/12] drm/i915: Introduce intel_atomic_get_plane_state_after_check(), v2
 2019-10-29  9:05 UTC  (28+ messages)
` [Intel-gfx] "
` [CI 02/12] drm/i915: Handle a few more cases for crtc hw/uapi split, v3
  ` [Intel-gfx] "
` [CI 03/12] drm/i915: Add aliases for uapi and hw to crtc_state
  ` [Intel-gfx] "
` [CI 04/12] drm/i915: Perform manual conversions for crtc uapi/hw split, v2
  ` [Intel-gfx] "
` [CI 05/12] drm/i915: Perform automated conversions for crtc uapi/hw split, base -> hw
  ` [Intel-gfx] "
` [CI 06/12] drm/i915: Perform automated conversions for crtc uapi/hw split, base -> uapi
  ` [Intel-gfx] "
` [CI 07/12] drm/i915: Complete crtc hw/uapi split, v4
  ` [Intel-gfx] "
` [CI 08/12] drm/i915: Add aliases for uapi and hw to plane_state
  ` [Intel-gfx] "
` [CI 09/12] drm/i915: Perform manual conversions for plane uapi/hw split
  ` [Intel-gfx] "
` [CI 10/12] drm/i915: Perform automated conversions for plane uapi/hw split, base -> hw
  ` [Intel-gfx] "
` [CI 11/12] drm/i915: Perform automated conversions for plane uapi/hw split, base -> uapi
  ` [Intel-gfx] "
` [CI 12/12] drm/i915: Complete plane hw and uapi split, v2
  ` [Intel-gfx] "
` ✗ Fi.CI.CHECKPATCH: warning for series starting with [CI,01/12] drm/i915: Introduce intel_atomic_get_plane_state_after_check(), v2
  ` [Intel-gfx] "
` ✗ Fi.CI.BAT: failure "
  ` [Intel-gfx] "

[PATCH V5 0/6] mdev based hardware virtio offloading support
 2019-10-29  7:42 UTC  (4+ messages)
` [PATCH V5 4/6] mdev: introduce virtio device and its device ops
    ` [Intel-gfx] "

[PATCH] drm/i915/vbt: Handle generic DTD block
 2019-10-29  7:10 UTC  (6+ messages)
` [PATCH v2] "
    ` [Intel-gfx] "
` ✗ Fi.CI.BAT: failure for drm/i915/vbt: Handle generic DTD block (rev2)
  ` [Intel-gfx] "

[PATCH] drm/i915/tgl: add support to one DP-MST stream
 2019-10-29  4:38 UTC  (7+ messages)
` ✓ Fi.CI.BAT: success for "
  ` [Intel-gfx] "
` [PATCH v2] "
  ` [Intel-gfx] "
` ✗ Fi.CI.BAT: failure for drm/i915/tgl: add support to one DP-MST stream (rev2)
  ` [Intel-gfx] "

[PATCH 1/5] drm/i915/selftests: Drop global engine lookup for gt selftests
 2019-10-29  2:15 UTC  (3+ messages)
` ✓ Fi.CI.IGT: success for series starting with [1/5] "
  ` [Intel-gfx] "

[CI] drm/i915/blt: fixup block_size rounding
 2019-10-29  1:50 UTC  (4+ messages)
` [Intel-gfx] "
` ✓ Fi.CI.BAT: success for drm/i915/blt: fixup block_size rounding (rev3)
  ` [Intel-gfx] "

[PATCH] drm/i915: Adding YUV444 packed format support for skl+ (V13)
 2019-10-29  1:25 UTC  (6+ messages)
` [Intel-gfx] "
` ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Adding YUV444 packed format support for skl+ (rev2)
  ` [Intel-gfx] "
` ✗ Fi.CI.BAT: failure "
  ` [Intel-gfx] "

[PATCH] drm/i915/guc: Skip suspend/resume GuC action on platforms w/o GuC submission
 2019-10-29  0:58 UTC  (4+ messages)
` [Intel-gfx] "
` ✗ Fi.CI.BAT: failure for "
  ` [Intel-gfx] "

[PATCH v6 00/10] Clear Color Support for TGL Render Decompression
 2019-10-29  0:49 UTC  (24+ messages)
` [Intel-gfx] "
` [PATCH v6 01/10] drm/framebuffer: Format modifier for Intel Gen-12 render compression
  ` [Intel-gfx] "
` [PATCH v6 02/10] drm/i915: Use intel_tile_height() instead of re-implementing
  ` [Intel-gfx] "
` [PATCH v6 03/10] drm/i915: Move CCS stride alignment W/A inside intel_fb_stride_alignment
  ` [Intel-gfx] "
` [PATCH v6 04/10] drm/i915/tgl: Gen-12 render decompression
  ` [Intel-gfx] "
` [PATCH v6 06/10] drm/framebuffer: Format modifier for Intel Gen-12 media compression
  ` [Intel-gfx] "
` [PATCH v6 07/10] drm/fb: Extend format_info member arrays to handle four planes
  ` [Intel-gfx] "
` [PATCH v6 08/10] Gen-12 display can decompress surfaces compressed by the media engine
  ` [Intel-gfx] "
` [PATCH v6 09/10] drm/framebuffer/tgl: Format modifier for Intel Gen 12 render compression with Clear Color
  ` [Intel-gfx] "
` [PATCH v6 10/10] drm/i915/tgl: Add Clear Color support for TGL Render Decompression
  ` [Intel-gfx] "
` ✗ Fi.CI.CHECKPATCH: warning for Clear Color Support for TGL Render Decompression (rev9)
  ` [Intel-gfx] "
` ✗ Fi.CI.BAT: failure "
  ` [Intel-gfx] "

[PATCH] lib/color_encoding: Fix up support for XYUV format
 2019-10-29  0:25 UTC  (4+ messages)
` [Intel-gfx] "
` ✗ Fi.CI.BUILD: failure for "
  ` [Intel-gfx] "

[CI] drm/i915/gem: Limit the blitter sizes to ensure low preemption latency
 2019-10-28 23:56 UTC  (3+ messages)
` ✗ Fi.CI.BAT: failure for drm/i915/gem: Limit the blitter sizes to ensure low preemption latency (rev2)
  ` [Intel-gfx] "

[PATCH] drm/i915: Program LUT before intel_color_commit() if LUT was not previously set v2
 2019-10-28 22:38 UTC  (3+ messages)
` ✗ Fi.CI.BAT: failure for drm/i915: Program LUT before intel_color_commit() if LUT was not previously set (rev2)
  ` [Intel-gfx] "

[PATCH] drm/i915/blt: fixup block_size rounding
 2019-10-28 21:55 UTC  (2+ messages)
` [Intel-gfx] "

[PATCH] drm/i914/guc: Fix resume on platforms w/o GuC submission but enabled
 2019-10-28 21:25 UTC  (7+ messages)
          ` [Intel-gfx] "

[PATCH] drm/i915/gt: Tidy up rps irq handler to use intel_gt
 2019-10-28 21:09 UTC  (3+ messages)
` ✓ Fi.CI.IGT: success for "
  ` [Intel-gfx] "

[PATCH] drm/i915/execlists: Use vfunc to check engine submission mode
 2019-10-28 20:51 UTC  (4+ messages)
` ✓ Fi.CI.BAT: success for drm/i915/execlists: Use vfunc to check engine submission mode (rev2)
    ` [Intel-gfx] "


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