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 messages from 2019-11-18 23:03:00 to 2019-11-19 13:12:37 UTC [more...]

[V3 0/8] Add support for mipi dsi cmd mode
 2019-11-19 13:12 UTC  (21+ messages)
` [Intel-gfx] "
` [V3 1/8] drm/i915/dsi: Configure transcoder operation for command mode
  ` [Intel-gfx] "
` [V3 2/8] drm/i915/dsi: Add vblank calculation "
  ` [Intel-gfx] "
` [V3 3/8] drm/i915/dsi: Add cmd mode flags in display mode private flags
  ` [Intel-gfx] "
` [V3 4/8] drm/i915/dsi: Add check for periodic command mode
  ` [Intel-gfx] "
` [V3 5/8] drm/i915/dsi: Use private flags to indicate TE in cmd mode
  ` [Intel-gfx] "
` [V3 6/8] drm/i915/dsi: Configure TE interrupt for "
  ` [Intel-gfx] "
` [V3 7/8] drm/i915/dsi: Add TE handler for dsi "
  ` [Intel-gfx] "
` [V3 8/8] drm/i915/dsi: Initiate fame request in "
  ` [Intel-gfx] "
` ✗ Fi.CI.CHECKPATCH: warning for Add support for mipi dsi cmd mode (rev2)
  ` [Intel-gfx] "
` ✗ Fi.CI.SPARSE: "

[ANNOUNCEMENT] Documenting tests with igt_describe()
 2019-11-19 13:02 UTC  (9+ messages)
      ` [Intel-gfx] "
      ` [igt-dev] "
        ` [Intel-gfx] "

[PATCH 1/4] drm/i915: Allow i915 to manage the vma offset nodes instead of drm core
 2019-11-19 12:46 UTC  (12+ messages)
` [Intel-gfx] "
` [PATCH 2/4] drm/i915: Introduce DRM_I915_GEM_MMAP_OFFSET
  ` [Intel-gfx] "
` [PATCH 3/4] drm/i915: cpu-map based dumb buffers
  ` [Intel-gfx] "
` [PATCH 4/4] drm/i915: Add cpu fault handler for mmap_offset
  ` [Intel-gfx] "
` ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/4] drm/i915: Allow i915 to manage the vma offset nodes instead of drm core
  ` [Intel-gfx] "

[PATCH V13 0/6] mdev based hardware virtio offloading support
 2019-11-19 12:40 UTC  (28+ messages)
` [PATCH V13 1/6] mdev: make mdev bus agnostic
    ` [Intel-gfx] "
` [PATCH V13 3/6] mdev: move to drivers/
    ` [Intel-gfx] "
` [PATCH V13 4/6] mdev: introduce mediated virtio bus
          ` [Intel-gfx] "
` [PATCH V13 6/6] docs: sample driver to demonstrate how to implement virtio-mdev framework
      ` [Intel-gfx] "

[PATCH] drm/i915/gem: Track ggtt writes from userspace on the bound vma
 2019-11-19 12:38 UTC  (4+ messages)
` [Intel-gfx] "
` ✓ Fi.CI.BAT: success for "
  ` [Intel-gfx] "

[PATCH] drm/i915/dsi: Do not read the transcoder register
 2019-11-19 11:55 UTC  (6+ messages)
` [Intel-gfx] "
` ✓ Fi.CI.BAT: success for "
  ` [Intel-gfx] "
` ✓ Fi.CI.IGT: "
  ` [Intel-gfx] "

[PATCH 01/17] drm/i915/gem: Manually dump the debug trace on GEM_BUG_ON
 2019-11-19 11:35 UTC  (46+ messages)
` [Intel-gfx] "
` [PATCH 02/17] drm/i915/gt: Close race between engine_park and intel_gt_retire_requests
  ` [Intel-gfx] "
` [PATCH 03/17] drm/i915/gt: Unlock engine-pm after queuing the kernel context switch
  ` [Intel-gfx] "
` [PATCH 04/17] drm/i915/gt: Make intel_ring_unpin() safe for concurrent pint
  ` [Intel-gfx] "
` [PATCH 05/17] drm/i915: Mark up the calling context for intel_wakeref_put()
  ` [Intel-gfx] "
` [PATCH 06/17] drm/i915/gem: Merge GGTT vma flush into a single loop
  ` [Intel-gfx] "
` [PATCH 07/17] drm/i915/gt: Only wait for register chipset flush if active
  ` [Intel-gfx] "
` [PATCH 08/17] drm/i915: Protect the obj->vma.list during iteration
  ` [Intel-gfx] "
` [PATCH 09/17] drm/i915: Wait until the intel_wakeref idle callback is complete
  ` [Intel-gfx] "
` [PATCH 10/17] drm/i915/gt: Declare timeline.lock to be irq-free
  ` [Intel-gfx] "
` [PATCH 11/17] drm/i915/gt: Move new timelines to the end of active_list
  ` [Intel-gfx] "
` [PATCH 12/17] drm/i915/gt: Schedule next retirement worker first
  ` [Intel-gfx] "
` [PATCH 13/17] drm/i915/gt: Flush the requests after wedging on suspend
  ` [Intel-gfx] "
` [PATCH 14/17] drm/i915/selftests: Force bonded submission to overlap
  ` [Intel-gfx] "
` [PATCH 15/17] drm/i915/selftests: Flush the active callbacks
  ` [Intel-gfx] "
` [PATCH 16/17] drm/i915/selftests: Be explicit in ERR_PTR handling
  ` [Intel-gfx] "
` [PATCH 17/17] drm/i915/selftests: Exercise rc6 handling
  ` [Intel-gfx] "
` ✗ Fi.CI.CHECKPATCH: warning for series starting with [01/17] drm/i915/gem: Manually dump the debug trace on GEM_BUG_ON
  ` [Intel-gfx] "
` ✓ Fi.CI.BAT: success "
  ` [Intel-gfx] "

[PATCH 0/7] drm: Random pile of core stuff
 2019-11-19 10:47 UTC  (13+ messages)
` [PATCH 3/7] drm: Extract page_flip_{internal, atomic}()
    ` [Intel-gfx] "
` [PATCH 5/7] drm/selftests: Add some selftests for drm_atomic_set_mode_for_crtc()
    ` [Intel-gfx] "
` [PATCH 6/7] drm/atomic: Fix the early return in drm_atomic_set_mode_for_crtc()
    ` [Intel-gfx] "
` [PATCH 7/7] drm/atomic: Reduce setplane locking
    ` [Intel-gfx] "

[PATCH 01/18] drm/i915/selftests: Force bonded submission to overlap
 2019-11-19 10:08 UTC  (4+ messages)
` [PATCH 08/18] drm/i915/gt: Only wait for register chipset flush if active
    ` [Intel-gfx] "

Fast soft-rc6
 2019-11-19  9:08 UTC  (46+ messages)
` [Intel-gfx] "
` [PATCH 01/19] drm/i915/selftests: Force bonded submission to overlap
  ` [Intel-gfx] "
` [PATCH 02/19] drm/i915/gem: Manually dump the debug trace on GEM_BUG_ON
  ` [Intel-gfx] "
` [PATCH 03/19] drm/i915/gt: Close race between engine_park and intel_gt_retire_requests
  ` [Intel-gfx] "
` [PATCH 04/19] drm/i915/gt: Unlock engine-pm after queuing the kernel context switch
  ` [Intel-gfx] "
` [PATCH 05/19] drm/i915/gt: Make intel_ring_unpin() safe for concurrent pint
  ` [Intel-gfx] "
` [PATCH 06/19] drm/i915/gt: Schedule request retirement when submission idles
  ` [Intel-gfx] "
` [PATCH 07/19] drm/i915: Mark up the calling context for intel_wakeref_put()
  ` [Intel-gfx] "
` [PATCH 08/19] drm/i915/gem: Merge GGTT vma flush into a single loop
  ` [Intel-gfx] "
` [PATCH 09/19] drm/i915/gt: Only wait for register chipset flush if active
  ` [Intel-gfx] "
` [PATCH 10/19] drm/i915: Protect the obj->vma.list during iteration
  ` [Intel-gfx] "
` [PATCH 11/19] drm/i915: Wait until the intel_wakeref idle callback is complete
  ` [Intel-gfx] "
` [PATCH 12/19] drm/i915/gt: Declare timeline.lock to be irq-free
  ` [Intel-gfx] "
` [PATCH 13/19] drm/i915/gt: Move new timelines to the end of active_list
  ` [Intel-gfx] "
` [PATCH 14/19] drm/i915/gt: Schedule next retirement worker first
  ` [Intel-gfx] "
` [PATCH 15/19] drm/i915/gt: Flush the requests after wedging on suspend
  ` [Intel-gfx] "
` [PATCH 16/19] drm/i915/selftests: Flush the active callbacks
  ` [Intel-gfx] "
` [PATCH 17/19] drm/i915/selftests: Be explicit in ERR_PTR handling
  ` [Intel-gfx] "
` [PATCH 18/19] drm/i915/selftests: Exercise rc6 handling
  ` [Intel-gfx] "
` [PATCH 19/19] drm/i915/gt: Track engine round-trip times
  ` [Intel-gfx] "
` ✗ Fi.CI.CHECKPATCH: warning for series starting with [01/19] drm/i915/selftests: Force bonded submission to overlap
  ` [Intel-gfx] "
` ✓ Fi.CI.BAT: success "
  ` [Intel-gfx] "
` ✗ Fi.CI.IGT: failure "
  ` [Intel-gfx] "

[PATCH v3 1/2] drm/i915/perf: Allow non-privileged access when OA buffer is not sampled
 2019-11-19  8:14 UTC  (5+ messages)
` ✓ Fi.CI.BAT: success for series starting with [v3,1/2] "
  ` [Intel-gfx] "
` ✗ Fi.CI.IGT: failure "
  ` [Intel-gfx] "

[PATCH i-g-t] i915/pm_rps: install SIGTERM handler for loader_helper
 2019-11-19  6:51 UTC  (2+ messages)
` [Intel-gfx] "

[PATCH] drm/i915/tgl: Add DKL PHY vswing table for HDMI
 2019-11-19  5:25 UTC  (3+ messages)
` ✓ Fi.CI.IGT: success for "
  ` [Intel-gfx] "

[PATCH] drm/i915/ehl: Update voltage level checks
 2019-11-19  5:08 UTC  (5+ messages)
` ✓ Fi.CI.IGT: success for "
  ` [Intel-gfx] "

[CI 1/5] drm/i915/guc: Drop leftover preemption code
 2019-11-19  1:55 UTC  (18+ messages)
` [Intel-gfx] "
` [CI 2/5] drm/i915/guc: add a helper to allocate and map guc vma
  ` [Intel-gfx] "
` [CI 3/5] drm/i915/guc: kill doorbell code and selftests
  ` [Intel-gfx] "
` [CI 4/5] drm/i915/guc: kill the GuC client
  ` [Intel-gfx] "
` [CI 5/5] HAX: force enable_guc=2
  ` [Intel-gfx] "
` ✗ Fi.CI.CHECKPATCH: warning for series starting with [CI,1/5] drm/i915/guc: Drop leftover preemption code
  ` [Intel-gfx] "
` ✗ Fi.CI.DOCS: "
  ` [Intel-gfx] "
` ✗ Fi.CI.BAT: failure "
  ` [Intel-gfx] "

[PATCH] drm/i915/gt: Unlock engine-pm after queuing the kernel context switch
 2019-11-19  1:29 UTC  (3+ messages)
` ✓ Fi.CI.IGT: success for "
  ` [Intel-gfx] "


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