messages from 2019-11-27 19:06:18 to 2019-11-28 11:31:00 UTC [more...]
[PATCH 00/13] video, drm: constify fbops in struct fb_info
2019-11-28 11:31 UTC (27+ messages)
` [PATCH 01/13] video: fb_defio: preserve user fb_ops
` [Intel-gfx] "
` [PATCH 02/13] drm/fb-helper: don't preserve fb_ops across deferred IO use
` [PATCH 13/13] samples: vfio-mdev: constify fb ops
` [Intel-gfx] "
` ✗ Fi.CI.CHECKPATCH: warning for video, drm: constify fbops in struct fb_info
` [Intel-gfx] "
` ✓ Fi.CI.BAT: success "
` [Intel-gfx] "
[PATCH] drm/i915/selftests: Try to show where the pulse went
2019-11-28 11:27 UTC (4+ messages)
` [Intel-gfx] "
[PATCH 1/4] drm/i915: Allow i915 to manage the vma offset nodes instead of drm core
2019-11-28 11:22 UTC (6+ messages)
` [PATCH 4/4] drm/i915: Add cpu fault handler for mmap_offset
` [Intel-gfx] "
[CI 1/3] drm/i915/selftests: Count the number of engines used
2019-11-28 11:13 UTC (12+ messages)
` [Intel-gfx] "
` [CI 2/3] drm/i915/selftests: Flush fput after running selftests
` [Intel-gfx] "
` [PATCH] "
` [Intel-gfx] "
` [CI 3/3] drm/i915/gen7: Re-enable full-ppgtt for ivb, byt, hsw
` [Intel-gfx] "
` ✗ Fi.CI.BAT: failure for series starting with [CI,1/3] drm/i915/selftests: Count the number of engines used
` [Intel-gfx] "
` ✗ Fi.CI.CHECKPATCH: warning for series starting with [CI,1/3] drm/i915/selftests: Count the number of engines used (rev2)
` [Intel-gfx] "
[PATCH i-g-t 1/2] Remove i915/gem_cpu_reloc
2019-11-28 11:05 UTC (6+ messages)
` [Intel-gfx] "
` [PATCH i-g-t 2/2] Remove i915/gem_exec_blt
` [Intel-gfx] "
[PATCH 08/13] video: fbdev: make fbops member of struct fb_info a const pointer
2019-11-28 10:46 UTC (5+ messages)
` [Intel-gfx] "
[CI] drm/i915/gt: Manual rc6 entry upon parking
2019-11-28 10:35 UTC (3+ messages)
` ✓ Fi.CI.IGT: success for drm/i915/gt: Manual rc6 entry upon parking (rev4)
` [Intel-gfx] "
[PATCH v6 0/3] Dynamic EU configuration of Slice/Sub-slice/EU
2019-11-28 10:27 UTC (8+ messages)
` [PATCH v6 3/3] drm/i915: Predictive governor to control slice/subslice/eu
` [Intel-gfx] "
[PATCH v6] drm/i915/tgl: Implement Wa_1604555607
2019-11-28 10:00 UTC (6+ messages)
` [Intel-gfx] "
` ✓ Fi.CI.BAT: success for "
` [Intel-gfx] "
[PATCH v3 0/2] drm: mmap fixups
2019-11-28 9:41 UTC (3+ messages)
` ✗ Fi.CI.IGT: failure for drm: mmap fixups (rev3)
` [Intel-gfx] "
[CI] drm/i915/tgl: Drop preemption to see if that helps
2019-11-28 9:21 UTC (2+ messages)
` [Intel-gfx] "
[RFC PATCH i-g-t] tests/prime_vgem: Skip MMAP_GTT based subtests if no mappable GGTT
2019-11-28 8:38 UTC (4+ messages)
` [Intel-gfx] "
[PATCH CI 1/5] drm/i915/psr: Add bits per pixel limitation
2019-11-28 2:49 UTC (12+ messages)
` [Intel-gfx] "
` [PATCH CI 2/5] drm/i915/psr: Refactor psr short pulse handler
` [Intel-gfx] "
` [PATCH CI 3/5] drm/i915/psr: Enable ALPM lock timeout error interruption
` [Intel-gfx] "
` [PATCH CI 4/5] drm/i915/psr: Check if sink PSR capability changed
` [Intel-gfx] "
` [PATCH CI 5/5] drm/i915/vbt: Parse power conservation features block
` [Intel-gfx] "
` ✓ Fi.CI.BAT: success for series starting with [CI,1/5] drm/i915/psr: Add bits per pixel limitation
` [Intel-gfx] "
[RFC 00/13] drm/i915/svm: Add SVM support
2019-11-28 2:04 UTC (11+ messages)
` [RFC 02/13] drm/i915/svm: Define SVM UAPI
` [Intel-gfx] "
` [RFC 03/13] drm/i915/svm: Runtime (RT) allocator support
` [Intel-gfx] "
[PATCH v2 1/5] drm/i915/psr: Add bits per pixel limitation
2019-11-28 1:58 UTC (19+ messages)
` [PATCH v2 2/5] drm/i915/psr: Refactor psr short pulse handler
` [Intel-gfx] "
` [PATCH v2 3/5] drm/i915/psr: Enable ALPM lock timeout error interruption
` [Intel-gfx] "
` [PATCH v2 4/5] drm/i915/psr: Check if sink PSR capability changed
` [Intel-gfx] "
` ✗ Fi.CI.IGT: failure for series starting with [v2,1/5] drm/i915/psr: Add bits per pixel limitation (rev2)
` [Intel-gfx] "
` [Intel-gfx] [PATCH v2 1/5] drm/i915/psr: Add bits per pixel limitation
` ✓ Fi.CI.BAT: success for series starting with [v2,1/5] drm/i915/psr: Add bits per pixel limitation (rev3)
` [Intel-gfx] "
[PATCH v2 00/14] drm/i915/fbc: Fix FBC for glk+
2019-11-28 1:33 UTC (34+ messages)
` [Intel-gfx] "
` [PATCH v2 01/14] drm/i915/fbc: Disable fbc by default on all glk+
` [Intel-gfx] "
` [PATCH v2 02/14] drm/i915/fbc: Nuke bogus single pipe fbc1 restriction
` [Intel-gfx] "
` [PATCH v2 03/14] drm/i915: Relocate intel_crtc_active()
` [Intel-gfx] "
` [PATCH v2 04/14] drm/i915/fbc: Remove the FBC_RT_BASE setup for ILK/SNB
` [Intel-gfx] "
` [PATCH v2 05/14] drm/i915/fbc: Precompute gen9 cfb stride w/a
` [Intel-gfx] "
` [PATCH v2 06/14] drm/i915/fbc: Track plane visibility
` [Intel-gfx] "
` [PATCH v2 07/14] drm/i915/fbc: Store fence_id direction in fbc cache/params
` [Intel-gfx] "
` [PATCH v2 08/14] drm/i915/fbc: Make fence_id optional for i965gm
` [Intel-gfx] "
` [PATCH v2 09/14] drm/i915/fbc: s/gen9 && !glk/gen9_bc || bxt/
` [Intel-gfx] "
` [PATCH v2 10/14] drm/i915/fbc: Nuke fbc.enabled
` [Intel-gfx] "
` [PATCH v2 11/14] drm/i915/fbc: Start using flip nuke
` [Intel-gfx] "
` [PATCH v2 12/14] drm/i915/fbc: Wait for vblank after FBC disable on glk+
` [Intel-gfx] "
` [PATCH v2 13/14] drm/i915/fbc: Enable fbc by default on glk+ once again
` [Intel-gfx] "
` [PATCH v2 14/14] drm/i915/fbc: Reallocate cfb if we need more of it
` [Intel-gfx] "
` ✗ Fi.CI.BAT: failure for drm/i915/fbc: Fix FBC for glk+ (rev4)
` [Intel-gfx] "
[PATCH] drm/i915/display/tgl: Do not program clockgating
2019-11-28 1:30 UTC (3+ messages)
` [Intel-gfx] "
[PATCH 1/7] drm/i915/display: Refactor intel_commit_modeset_disables()
2019-11-28 1:14 UTC (19+ messages)
` [PATCH 3/7] drm/i915/tgl: Select master trasconder for MST stream
` [Intel-gfx] "
` [PATCH 4/7] drm/i915/dp: Power down sink before disable pipe/transcoder clock
` [Intel-gfx] "
` [Intel-gfx] [PATCH 1/7] drm/i915/display: Refactor intel_commit_modeset_disables()
[PATCH] drm/i915/display: Suspend MST topology manager before destroy fbdev
2019-11-28 1:01 UTC (6+ messages)
` [Intel-gfx] "
` ✓ Fi.CI.BAT: success for drm/i915/display: Suspend MST topology manager before destroy fbdev (rev3)
` [Intel-gfx] "
[PATCH v2 5/5] drm/i915/vbt: Parse power conservation features block
2019-11-28 0:38 UTC (5+ messages)
` [PATCH v3 "
` [Intel-gfx] "
[CI 1/3] drm/i915: Handle SDEISR according to PCH rather than platform
2019-11-28 0:09 UTC (8+ messages)
` [Intel-gfx] "
` [CI 2/3] drm/i915/ehl: Make icp_digital_port_connected() use phy instead of port
` [Intel-gfx] "
` [CI 3/3] drm/i915: Program SHPD_FILTER_CNT on CNP+
` [Intel-gfx] "
` ✓ Fi.CI.BAT: success for series starting with [CI,1/3] drm/i915: Handle SDEISR according to PCH rather than platform
` [Intel-gfx] "
[PATCH 0/7] drm/i915: Cleanups around pre/post plane update
2019-11-27 23:57 UTC (28+ messages)
` [PATCH 1/7] drm/i915: Clean up arguments to nv12/scaler w/a funcs
` [Intel-gfx] "
` [PATCH 2/7] drm/i915: Pass dev_priv to ilk_disable_lp_wm()
` [Intel-gfx] "
` [PATCH 3/7] drm/i915: s/pipe_config/new_crtc_state/ intel_{pre, post}_plane_update()
` [Intel-gfx] "
` [PATCH 4/7] drm/i915: Clean up "
` [Intel-gfx] "
` [PATCH 5/7] drm/i915: Clean up the gen2 "no planes -> underrun" workaround
` [Intel-gfx] "
` [PATCH 6/7] drm/i915: Nuke intel_pre_disable_primary_noatomic()
` [Intel-gfx] "
` [PATCH 7/7] drm/i915: Make intel_crtc_arm_fifo_underrun() functional on gen2
` [Intel-gfx] "
` ✓ Fi.CI.BAT: success for drm/i915: Cleanups around pre/post plane update
` [Intel-gfx] "
[PATCH] drm/i915/dsb: fix cmd_buf being wrongly set
2019-11-27 23:42 UTC (6+ messages)
` [Intel-gfx] "
` ✗ Fi.CI.CHECKPATCH: warning for "
` [Intel-gfx] "
` ✓ Fi.CI.BAT: success "
` [Intel-gfx] "
[PATCH v2 0/4] drm/rect: Bugfixes and selftests
2019-11-27 10:19 UTC (3+ messages)
` [Intel-gfx] "
Kernel >=5.3.11 hangs intel GPU and 5.4.0 freezes completely
2019-11-27 21:07 UTC (2+ messages)
` [Intel-gfx] "
[PATCH 1/5] drm/i915/psr: Add bits per pixel limitation
2019-11-27 22:48 UTC (8+ messages)
` [PATCH 5/5] drm/i915/vbt: Parse power conservation features block
` [Intel-gfx] "
[CI] drm/i915/gen7: Re-enable full-ppgtt for ivb, byt, hsw
2019-11-27 21:51 UTC (3+ messages)
` ✗ Fi.CI.BAT: failure for drm/i915/gen7: Re-enable full-ppgtt for ivb, byt, hsw (rev5)
` [Intel-gfx] "
[PATCH 1/3] drm/i915: Handle SDEISR according to PCH rather than platform
2019-11-27 21:17 UTC (3+ messages)
` ✗ Fi.CI.BAT: failure for series starting with [1/3] drm/i915: Handle SDEISR according to PCH rather than platform (rev4)
` [Intel-gfx] "
[PATCH 0/3] bios: dot not discard address space
2019-11-27 20:12 UTC (3+ messages)
` ✗ Fi.CI.IGT: failure for bios: dot not discard address space (rev2)
` [Intel-gfx] "
[PATCH v6 0/4] Enable second DBuf slice for ICL and TGL
2019-11-27 19:59 UTC (5+ messages)
` ✗ Fi.CI.SPARSE: warning for Enable second DBuf slice for ICL and TGL (rev2)
` [Intel-gfx] "
` ✓ Fi.CI.BAT: success "
` [Intel-gfx] "
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