messages from 2019-12-26 02:37:31 to 2019-12-31 15:25:12 UTC [more...]
[Intel-gfx] [PATCH v2 2/9] drm/amd/display: Fix compilation issue
2019-12-30 16:30 UTC (8+ messages)
` [Intel-gfx] [PATCH v3 1/9] drm/amd/display: Align macro name as per DP spec
` [Intel-gfx] [PATCH v3 2/9] drm/dp: get/set phy compliance pattern
[Intel-gfx] [PULL] drm-misc-fixes
2019-12-31 15:25 UTC
[Intel-gfx] [PATCH] drm/i915: save state of AUD_FREQ_CNTRL on all gen9+ platforms
2019-12-31 14:47 UTC
[Intel-gfx] [PATCH v2] drm/i915: Limit audio CDCLK>=2*BCLK constraint back to GLK only
2019-12-31 14:38 UTC (2+ messages)
` [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Limit audio CDCLK>=2*BCLK constraint back to GLK only (rev2)
[Intel-gfx] [CI] drm/i915/gt: Tweak flushes around ivb ppgtt
2019-12-31 14:30 UTC (3+ messages)
` [Intel-gfx] ✓ Fi.CI.BAT: success for "
` [Intel-gfx] ✓ Fi.CI.IGT: "
[Intel-gfx] [PATCH] drm/i915: Limit audio CDCLK>=2*BCLK constraint back to GLK only
2019-12-31 13:41 UTC
[Intel-gfx] [PATCH] drm/i915/gt: Restore coarse power gating
2019-12-31 13:18 UTC (3+ messages)
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for "
` [Intel-gfx] ✓ Fi.CI.BAT: success "
[Intel-gfx] [PATCH 1/5] drm/i915/gt: Include a bunch more rcs image state
2019-12-31 13:14 UTC (8+ messages)
` [Intel-gfx] [PATCH 2/5] drm/i915/gt: Clear LRC image inline
` [Intel-gfx] [PATCH 3/5] drm/i915/gt: Ignore stale context state upon resume
` [Intel-gfx] [PATCH 4/5] drm/i915/gt: Discard stale context state from across idling
` [Intel-gfx] [PATCH 5/5] drm/i915/gt: Always poison the kernel_context image before unparking
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/5] drm/i915/gt: Include a bunch more rcs image state
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✓ Fi.CI.IGT: "
[Intel-gfx] [PATCH 0/9] RFC: display/ddi: keep register indexes in a table
2019-12-31 11:22 UTC (16+ messages)
` [Intel-gfx] [PATCH 4/9] drm/i915/display: start description-based ddi initialization
` [Intel-gfx] [PATCH 5/9] drm/i915/display: move icl to description-based ddi init
` [Intel-gfx] [PATCH 6/9] drm/i915/display: description-based initialization for remaining ddi platforms
` [Intel-gfx] [PATCH 7/9] drm/i915/display: add phy, vbt and ddi indexes
` [Intel-gfx] [PATCH 8/9] drm/i915/display: refer to vbt info as vbt_port_info
` [Intel-gfx] [PATCH 9/9] drm/i915/display: use port_info on intel_ddi_init
[Intel-gfx] [PATCH] drm/i915: Stop programming DDI_BUF_TRANS_SELECT on recent platforms
2019-12-31 10:54 UTC (3+ messages)
` [Intel-gfx] ✓ Fi.CI.BAT: success for "
` [Intel-gfx] ✓ Fi.CI.IGT: "
[Intel-gfx] [PATCH v3 0/9] DP Phy compliance auto test
2019-12-31 7:05 UTC (13+ messages)
` [Intel-gfx] [PATCH v3 1/9] drm/amd/display: Align macro name as per DP spec
` [Intel-gfx] [PATCH v3 2/9] drm/dp: get/set phy compliance pattern
` [Intel-gfx] [PATCH v3 3/9] drm/i915/dp: Move vswing/pre-emphasis adjustment calculation
` [Intel-gfx] [PATCH v3 4/9] drm/i915/dp: Preparation for DP phy compliance auto test
` [Intel-gfx] [PATCH v3 5/9] drm/i915/dsb: Send uevent to testapp
` [Intel-gfx] [PATCH v3 6/9] drm/i915/dp: Add debugfs entry for DP phy compliance
` [Intel-gfx] [PATCH v3 7/9] drm/i915/dp: Register definition for DP compliance register
` [Intel-gfx] [PATCH v3 8/9] drm/i915/dp: Update the pattern as per request
` [Intel-gfx] [PATCH v3 9/9] drm/i915/dp: [FIXME] Program vswing, pre-emphasis, test-pattern
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for DP Phy compliance auto test (rev5)
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✓ Fi.CI.IGT: "
[Intel-gfx] [PATCH] drm/i915/selftests: Flush the context worker
2019-12-31 3:57 UTC (5+ messages)
` [Intel-gfx] ✓ Fi.CI.BAT: success for "
` [Intel-gfx] ✓ Fi.CI.IGT: "
[Intel-gfx] [PATCH 0/3] dumb buffer patches
2019-12-30 22:56 UTC (6+ messages)
` [Intel-gfx] [PATCH 1/3] drm/i915: lookup for mem_region of a mem_type
` [Intel-gfx] [PATCH 2/3] drm/i915: Create dumb buffer from LMEM
` [Intel-gfx] [PATCH 3/3] drm/i915/dumb: return the allocated memory size
` [Intel-gfx] ✓ Fi.CI.BAT: success for dumb buffer patches
` [Intel-gfx] ✓ Fi.CI.IGT: "
[Intel-gfx] [PATCH 1/7] drm/i915/gt: Ensure that all new contexts clear STOP_RING
2019-12-30 21:07 UTC (22+ messages)
` [Intel-gfx] [PATCH 2/7] drm/i915/gt: Avoid using tag 0 for the very first submission
` [Intel-gfx] [PATCH 3/7] drm/i915/gt: Avoid using the GPU before initialisation
` [Intel-gfx] [PATCH 4/7] drm/i915/gt: Do not restore invalid RS state
` [Intel-gfx] [PATCH 5/7] drm/i915/gt: Ignore stale context state upon resume
` [Intel-gfx] [PATCH 6/7] drm/i915/gt: Discard stale context state from across idling
` [Intel-gfx] [PATCH 7/7] drm/i915/gt: Always poison the kernel_context image before unparking
` [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/7] drm/i915/gt: Ensure that all new contexts clear STOP_RING
` [Intel-gfx] ✓ Fi.CI.IGT: "
` [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/7] drm/i915/gt: Ensure that all new contexts clear STOP_RING (rev2)
` [Intel-gfx] ✓ Fi.CI.IGT: "
` [Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [1/7] drm/i915/gt: Ensure that all new contexts clear STOP_RING (rev3)
` [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/7] drm/i915/gt: Ensure that all new contexts clear STOP_RING (rev4)
` [Intel-gfx] ✗ Fi.CI.IGT: failure "
[Intel-gfx] [PATCH 1/3] drm/i915: Add support for non-power-of-2 FB plane alignment
2019-12-30 20:43 UTC (12+ messages)
` [Intel-gfx] [PATCH 2/3] drm/i915/tgl: Make sure a semiplanar UV plane is tile row size aligned
` [Intel-gfx] [PATCH 3/3] drm/i915: Add debug message for FB plane[0].offset!=0 error
` [Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [1/3] drm/i915: Add support for non-power-of-2 FB plane alignment
` [Intel-gfx] [PATCH v2 1/3] "
` [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [v2,1/3] drm/i915: Add support for non-power-of-2 FB plane alignment (rev2)
` [Intel-gfx] ✓ Fi.CI.IGT: "
[Intel-gfx] [CI 1/2] drm/i915/selftests: Flush the context worker
2019-12-30 18:00 UTC (3+ messages)
` [Intel-gfx] [CI 2/2] drm/i915/gt: Leave RING_BB_STATE to default value
` [Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [CI,1/2] drm/i915/selftests: Flush the context worker
[Intel-gfx] [PATCH 1/6] drm/i915/selftests: Flush the context worker
2019-12-30 17:08 UTC (17+ messages)
` [Intel-gfx] [PATCH 2/6] drm/i915/gt: Clear LRC image inline
` [Intel-gfx] [PATCH 3/6] drm/i915/gt: Leave RING_BB_STATE to default value
` [Intel-gfx] [PATCH 4/6] drm/i915/gt: Ignore stale context state upon resume
` [Intel-gfx] [PATCH 5/6] drm/i915/gt: Discard stale context state from across idling
` [Intel-gfx] [PATCH 6/6] drm/i915/gt: Always poison the kernel_context image before unparking
` [Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [1/6] drm/i915/selftests: Flush the context worker
[PATCH] drm/i915: save AUD_FREQ_CNTRL state at audio domain suspend
2019-12-30 16:03 UTC (3+ messages)
` [Intel-gfx] "
[Intel-gfx] [bug] i915 flickering display after some of the 5.5rc3 patches
2019-12-30 14:58 UTC (2+ messages)
[PATCH 1/3] drm/i915/psr: Share the computation of idle frames
2019-12-30 14:21 UTC (8+ messages)
` [PATCH 3/3] drm/i915/dc3co: Avoid full modeset when EXITLINE needs to be changed
` [Intel-gfx] [PATCH 3/3] drm/i915/dc3co: Avoid full modeset when EXITLINE needs to be changedy
` [Intel-gfx] [PATCH 1/3] drm/i915/psr: Share the computation of idle frames
[Intel-gfx] [PATCH v2 0/5] drm/i915/dsi: Control panel and backlight enable GPIOs from VBT
2019-12-30 13:31 UTC (3+ messages)
` [Intel-gfx] [PATCH v2 1/5] pinctrl: Allow modules to use pinctrl_[un]register_mappings
[Intel-gfx] [PATCH] drn/i915: Break up long i915_buddy_free_list() with a cond_resched()
2019-12-30 12:01 UTC (2+ messages)
[Intel-gfx] [PATCH] drm/i915: Add Wa_1407352427:icl,ehl
2019-12-30 0:56 UTC (6+ messages)
` [Intel-gfx] [PATCH v2] "
` [Intel-gfx] ✗ Fi.CI.BAT: failure for "
` [Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915: Add Wa_1407352427:icl,ehl (rev2)
[Intel-gfx] Plans for i915 GuC Submission with regards to IPTS/ME
2019-12-28 12:24 UTC (4+ messages)
[Intel-gfx] [PATCH v4 0/7] Introduce CAP_SYS_PERFMON to secure system performance monitoring and observability
2019-12-28 3:53 UTC (3+ messages)
` [Intel-gfx] [PATCH v4 1/9] capabilities: introduce CAP_SYS_PERFMON to kernel and user space
[Intel-gfx] [CI 1/2] drm/i915/gt: Ensure that all new contexts clear STOP_RING
2019-12-29 13:36 UTC (4+ messages)
` [Intel-gfx] [CI 2/2] drm/i915/gt: Avoid using tag 0 for the very first submission
` [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [CI,1/2] drm/i915/gt: Ensure that all new contexts clear STOP_RING
` [Intel-gfx] ✓ Fi.CI.IGT: "
[Intel-gfx] [CI] drm/i915/gt: Ensure that all new contexts clear STOP_RING
2019-12-29 0:13 UTC (2+ messages)
` [Intel-gfx] ✗ Fi.CI.BAT: failure for "
[Intel-gfx] [CI] drm/i915/gt: Avoid using tag 0 for the very first submission
2019-12-28 17:46 UTC (2+ messages)
` [Intel-gfx] ✗ Fi.CI.BAT: failure for "
[Intel-gfx] [CI] drm/i915: Restore very early GPU reset
2019-12-28 13:07 UTC (3+ messages)
` [Intel-gfx] ✓ Fi.CI.BAT: success for "
` [Intel-gfx] ✓ Fi.CI.IGT: "
[Intel-gfx] [CI v6 1/3] drm/i915/dp: Make sure all tiled connectors get added to the state with full modeset
2019-12-28 4:59 UTC (5+ messages)
` [Intel-gfx] [CI v6 2/3] drm/i915/dp: Make port sync mode assignments only if all tiles present
` [Intel-gfx] [CI v6 3/3] drm/i915/dp: Disable Port sync mode correctly on teardown
` [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [CI,v6,1/3] drm/i915/dp: Make sure all tiled connectors get added to the state with full modeset
` [Intel-gfx] ✓ Fi.CI.IGT: "
[Intel-gfx] [PATCH v5 1/3] drm/i915/dp: Make sure all tiled connectors get added to the state with full modeset
2019-12-28 0:23 UTC (8+ messages)
[Intel-gfx] [PATCH v5] drm/i915/lmem: debugfs for LMEM details
2019-12-27 19:12 UTC (4+ messages)
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/lmem: debugfs for LMEM details (rev5)
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✓ Fi.CI.IGT: "
[Intel-gfx] [PATCH 0/3] Workaround updates
2019-12-27 18:49 UTC (7+ messages)
` [Intel-gfx] ✓ Fi.CI.IGT: success for Workaround updates (rev3)
[Intel-gfx] [V4 0/8] Add support for mipi dsi cmd mode
2019-12-27 18:23 UTC (13+ messages)
` [Intel-gfx] [V4 1/8] drm/i915/dsi: Configure transcoder operation for command mode
` [Intel-gfx] [V4 2/8] drm/i915/dsi: Add vblank calculation "
` [Intel-gfx] [V4 3/8] drm/i915/dsi: Add cmd mode flags in display mode private flags
` [Intel-gfx] [V4 4/8] drm/i915/dsi: Add check for periodic command mode
` [Intel-gfx] [V4 5/8] drm/i915/dsi: Use private flags to indicate TE in cmd mode
` [Intel-gfx] [V4 6/8] drm/i915/dsi: Configure TE interrupt for "
` [Intel-gfx] [V4 7/8] drm/i915/dsi: Add TE handler for dsi "
` [Intel-gfx] [V4 8/8] drm/i915/dsi: Initiate fame request in "
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Add support for mipi dsi cmd mode (rev3)
` [Intel-gfx] ✗ Fi.CI.SPARSE: "
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✗ Fi.CI.IGT: failure "
[Intel-gfx] [PATCH] drm/i915/selftests: Err out on coherency if initialisation failed
2019-12-27 16:54 UTC (2+ messages)
` [Intel-gfx] ✗ Fi.CI.BAT: failure for "
[Intel-gfx] [PATCH 3/3] drm/i915/selftests: Add selftest for memory region PF handling
2019-12-27 13:52 UTC (2+ messages)
[Intel-gfx] [PATCH] drm/i915/tgl: Assume future platforms will inherit TGL's SFC capability
2019-12-27 13:52 UTC (7+ messages)
` [Intel-gfx] ✗ Fi.CI.BAT: failure for "
` [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/tgl: Assume future platforms will inherit TGL's SFC capability (rev2)
` [Intel-gfx] ✗ Fi.CI.IGT: failure "
[Intel-gfx] [PATCH] drm/i915/dsb: Increase log level if DSB engine gets busy
2019-12-27 11:40 UTC (4+ messages)
` [Intel-gfx] ✗ Fi.CI.IGT: failure for "
[Intel-gfx] [PATCH v4] drm/i915/lmem: debugfs for LMEM details
2019-12-27 11:00 UTC (3+ messages)
` [Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/lmem: debugfs for LMEM details (rev4)
[Intel-gfx] [CI 01/10] drm/i915: simplify prefixes on device_info
2019-12-27 10:51 UTC (2+ messages)
` [Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [CI,01/10] drm/i915: simplify prefixes on device_info (rev3)
[Intel-gfx] [PATCH 1/3] drm/i915: Introduce remap_io_sg() to prefault discontiguous objects
2019-12-27 9:43 UTC (2+ messages)
[Intel-gfx] [PATCH] drm/i915/display: nuke skl workaround for pre-production hw
2019-12-27 4:49 UTC (2+ messages)
` [Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/display: nuke skl workaround for pre-production hw (rev2)
[Intel-gfx] [PATCH] drm/i915/gt: Apply sanitiization just before resume
2019-12-26 22:07 UTC (2+ messages)
` [Intel-gfx] ✓ Fi.CI.IGT: success for "
[Intel-gfx] [PATCH 1/3] drm/i915: use true, false for bool variable in i915_debugfs.c
2019-12-24 8:12 UTC
[Intel-gfx] [PATCH 2/3] drm/i915/dp: use true, false for bool variable in intel_dp.c
2019-12-24 8:14 UTC
[Intel-gfx] [PATCH 3/3] drm/i915: use true, false for bool variable in intel_crt.c
2019-12-24 8:15 UTC
[Intel-gfx] [PATCH] drm/i915/gt: Ignore incomplete engines after init failure
2019-12-26 19:49 UTC (2+ messages)
` [Intel-gfx] ✗ Fi.CI.BAT: failure for "
[Intel-gfx] [PATCH] drm/i915: Fix enable OA report logic
2019-12-26 17:03 UTC (2+ messages)
[Intel-gfx] [PATCH] drm/i915/gt: Flush other retirees inside intel_gt_retire_requests()
2019-12-26 15:29 UTC (2+ messages)
` [Intel-gfx] ✓ Fi.CI.IGT: success for "
[Intel-gfx] [CI] drm/i915/gt: Apply sanitiization just before resume
2019-12-26 12:28 UTC (2+ messages)
` [Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915/gt: Apply sanitiization just before resume (rev2)
[Intel-gfx] [PATCH 1/2] drm/i915: Add spaces before compound GEM_TRACE
2019-12-26 8:54 UTC (2+ messages)
` [Intel-gfx] ✗ Fi.CI.IGT: failure for series starting with [1/2] "
[Intel-gfx] [PATCH 1/5] drm/i915/gt: Ignore stale context state upon resume
2019-12-26 2:37 UTC (2+ messages)
` [Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [1/5] "
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