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 messages from 2020-03-05 18:02:54 to 2020-03-06 16:21:16 UTC [more...]

[Intel-gfx] [PATCH] drm/i915/gt: Close race between cacheline_retire and free
 2020-03-06 16:19 UTC  (2+ messages)

[Intel-gfx] [PATCH] drm/i915/execlists: Show the "switch priority hint" in dumps
 2020-03-06 16:12 UTC  (4+ messages)
` [Intel-gfx] ✗ Fi.CI.DOCS: warning for "
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✓ Fi.CI.IGT: "

[Intel-gfx] [PATCH v2 0/9] drm/i915: Gamma cleanups
 2020-03-06 15:40 UTC  (21+ messages)
` [Intel-gfx] [PATCH v2 1/9] drm/i915: Polish CHV CGM CSC loading
` [Intel-gfx] [PATCH v2 2/9] drm/i915: Clean up i9xx_load_luts_internal()
` [Intel-gfx] [PATCH v2 3/9] drm/i915: Split i9xx_read_lut_8() to gmch vs. ilk variants
` [Intel-gfx] [PATCH v2 4/9] drm/i915: s/blob_data/lut/
` [Intel-gfx] [PATCH v2 5/9] drm/i915: s/chv_read_cgm_lut/chv_read_cgm_gamma/
` [Intel-gfx] [PATCH v2 6/9] drm/i915: Clean up integer types in color code
` [Intel-gfx] [PATCH v2 7/9] drm/i915: Refactor LUT read functions
` [Intel-gfx] [PATCH v2 9/9] drm/i915: Pass the crtc to the low level read_lut() funcs

[Intel-gfx] [PATCH v2] drm/i915: HDCP: fix Ri prime and R0 checks during auth
 2020-03-06 15:27 UTC  (3+ messages)
` [Intel-gfx] ✗ Fi.CI.DOCS: warning for drm/i915: HDCP: fix Ri prime and R0 checks during auth (rev2)
` [Intel-gfx] ✓ Fi.CI.IGT: success "

[Intel-gfx] [PATCH] drm/i915: Do not poison i915_request.link on removal
 2020-03-06 15:04 UTC  (2+ messages)

[Intel-gfx] [PATCH v4 1/2] drm/edid: Name the detailed monitor range flags
 2020-03-06 15:02 UTC  (6+ messages)
` [Intel-gfx] [PATCH v4 2/2] drm/dp: Add function to parse EDID descriptors for adaptive sync limits
` [Intel-gfx] ✗ Fi.CI.DOCS: warning for series starting with [v4,1/2] drm/edid: Name the detailed monitor range flags
` [Intel-gfx] ✓ Fi.CI.BAT: success "

[Intel-gfx] [PATCH] drm/i915: Return early for await_start on same timeline
 2020-03-06 14:50 UTC  (4+ messages)
` [Intel-gfx] ✗ Fi.CI.DOCS: warning for "
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✗ Fi.CI.IGT: failure "

[Intel-gfx] [PATCH 01/17] drm/i915/selftests: Apply a heavy handed flush to i915_active
 2020-03-06 14:44 UTC  (20+ messages)
` [Intel-gfx] [PATCH 02/17] drm/i915/execlists: Enable timeslice on partial virtual engine dequeue
` [Intel-gfx] [PATCH 03/17] drm/i915: Improve the start alignment of bonded pairs
` [Intel-gfx] [PATCH 04/17] drm/i915: Tweak scheduler's kick_submission()
` [Intel-gfx] [PATCH 05/17] drm/i915: Wrap i915_active in a simple kreffed struct
` [Intel-gfx] [PATCH 06/17] drm/i915: Extend i915_request_await_active to use all timelines
` [Intel-gfx] [PATCH 07/17] drm/i915/perf: Schedule oa_config after modifying the contexts
` [Intel-gfx] [PATCH 08/17] drm/i915/selftests: Add request throughput measurement to perf
` [Intel-gfx] [PATCH 09/17] dma-buf: Prettify typecasts for dma-fence-chain
` [Intel-gfx] [PATCH 10/17] dma-buf: Report signaled links inside dma-fence-chain
` [Intel-gfx] [PATCH 11/17] dma-buf: Exercise dma-fence-chain under selftests
` [Intel-gfx] [PATCH 12/17] dma-buf: Proxy fence, an unsignaled fence placeholder
` [Intel-gfx] [PATCH 13/17] drm/syncobj: Allow use of dma-fence-proxy
` [Intel-gfx] [PATCH 14/17] drm/i915/gem: Teach execbuf how to wait on future syncobj
` [Intel-gfx] [PATCH 15/17] drm/i915/gem: Allow combining submit-fences with syncobj
` [Intel-gfx] [PATCH 16/17] drm/i915/gt: Declare when we enabled timeslicing
` [Intel-gfx] [PATCH 17/17] drm/i915/gt: Yield the timeslice if caught waiting on a user semaphore

[Intel-gfx] [PATCH i-g-t 1/2] gem_wsim: Fix calibration for special VCS engine name
 2020-03-06 14:38 UTC  (2+ messages)
` [Intel-gfx] [PATCH i-g-t 2/2] gem_wsim: Mark contexts as non-persistent

[Intel-gfx] [PATCH v3 1/3] drm/i915/display: Deactive FBC in fastsets when disabled by parameter
 2020-03-06 14:22 UTC  (10+ messages)
` [Intel-gfx] [PATCH v3 3/3] drm/i915/display/fbc: Make fences a nice-to-have for GEN9+
` [Intel-gfx] ✗ Fi.CI.BUILD: failure for series starting with [v3,1/3] drm/i915/display: Deactive FBC in fastsets when disabled by parameter (rev2)

[Intel-gfx] [PATCH 1/3] drm/i915/execlists: Enable timeslice on partial virtual engine dequeue
 2020-03-06 14:06 UTC  (4+ messages)
` [Intel-gfx] [PATCH 2/3] drm/i915: Improve the start alignment of bonded pairs
` [Intel-gfx] [PATCH 3/3] drm/i915: Tweak scheduler's kick_submission()

[Intel-gfx] [RESEND PATCH v2 0/7] drm: drm_fb_helper cleanup
 2020-03-06 13:54 UTC  (5+ messages)
` [Intel-gfx] ✗ Fi.CI.DOCS: warning for drm: drm_fb_helper cleanup. (rev3)
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✓ Fi.CI.IGT: "

[Intel-gfx] [PATCH v3] drm/i915: properly sanity check batch_start_offset
 2020-03-06 13:13 UTC  (3+ messages)
` [Intel-gfx] ✗ Fi.CI.DOCS: warning for drm/i915: properly sanity check batch_start_offset (rev3)
` [Intel-gfx] ✗ Fi.CI.BAT: failure "

[Intel-gfx] [PATCH 01/17] drm/i915: Add an implementation for i915_gem_ww_ctx locking, v2
 2020-03-06 12:30 UTC  (17+ messages)
` [Intel-gfx] [PATCH 02/17] drm/i915: Remove locking from i915_gem_object_prepare_read/write
` [Intel-gfx] [PATCH 03/17] drm/i915: Parse command buffer earlier in eb_relocate(slow)
` [Intel-gfx] [PATCH 04/17] drm/i915: Use per object locking in execbuf, v5
` [Intel-gfx] [PATCH 05/17] drm/i915: Use ww locking in intel_renderstate
` [Intel-gfx] [PATCH 06/17] drm/i915: Add ww context handling to context_barrier_task
` [Intel-gfx] [PATCH 07/17] drm/i915: Nuke arguments to eb_pin_engine
` [Intel-gfx] [PATCH 08/17] drm/i915: Pin engine before pinning all objects, v3
` [Intel-gfx] [PATCH 09/17] drm/i915: Rework intel_context pinning to do everything outside of pin_mutex
` [Intel-gfx] [PATCH 10/17] drm/i915: Make sure execbuffer always passes ww state to i915_vma_pin
` [Intel-gfx] [PATCH 11/17] drm/i915: Convert i915_gem_object/client_blt.c to use ww locking as well, v2
` [Intel-gfx] [PATCH 12/17] drm/i915: Kill last user of intel_context_create_request outside of selftests
` [Intel-gfx] [PATCH 13/17] drm/i915: Convert i915_perf to ww locking as well
` [Intel-gfx] [PATCH 14/17] drm/i915: Dirty hack to fix selftests locking inversion
` [Intel-gfx] [PATCH 15/17] drm/i915/selftests: Fix locking inversion in lrc selftest
` [Intel-gfx] [PATCH 16/17] drm/i915: Use ww pinning for intel_context_create_request()
` [Intel-gfx] [PATCH 17/17] drm/i915: Move i915_vma_lock in the live selftest to avoid lock inversion

[Intel-gfx] [PATCH] drm/i915: Actually emit the await_start
 2020-03-06 12:28 UTC  (4+ messages)
` [Intel-gfx] ✗ Fi.CI.DOCS: warning for "
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✓ Fi.CI.IGT: "

[Intel-gfx] [RFC 0/7] Asynchronous flip implementation for i915
 2020-03-06 11:39 UTC  (8+ messages)
` [Intel-gfx] [RFC 1/7] drm/i915: Define flip done functions and enable IER
` [Intel-gfx] [RFC 2/7] drm/i915: Add support for async flips in I915
` [Intel-gfx] [RFC 3/7] drm/i915: Make commit call blocking in case of async flips
` [Intel-gfx] [RFC 4/7] drm/i915: Add checks specific to "
` [Intel-gfx] [RFC 5/7] drm/i915: Add flip_done_handler definition
` [Intel-gfx] [RFC 6/7] drm/i915: Enable and handle flip done interrupt
` [Intel-gfx] [RFC 7/7] drm/i915: Do not call drm_crtc_arm_vblank_event in async flips

[Intel-gfx] [PATCH] drm/i915: Improve the start alignment of bonded pairs
 2020-03-06 11:45 UTC  (4+ messages)
` [Intel-gfx] ✗ Fi.CI.DOCS: warning for "
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✓ Fi.CI.IGT: "

[Intel-gfx] [PATCH] MAINTAINERS: adjust to reservation.h renaming
 2020-03-06 10:56 UTC  (4+ messages)

[Intel-gfx] [PATCH] drm/i915/execlists: Enable timeslice on partial virtual engine dequeue
 2020-03-06 10:57 UTC  (4+ messages)
` [Intel-gfx] ✗ Fi.CI.DOCS: warning for "
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✓ Fi.CI.IGT: "

[Intel-gfx] [PATCH] drm/i915/gt: allow setting generic data pointer
 2020-03-06 10:47 UTC  (8+ messages)
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for "
` [Intel-gfx] ✗ Fi.CI.DOCS: "
` [Intel-gfx] ✓ Fi.CI.BAT: success "

[Intel-gfx] [PATCH 1/3] drm/i915: Assert requests within a context are submitted in order
 2020-03-06 10:41 UTC  (8+ messages)
` [Intel-gfx] [PATCH 2/3] drm/i915: Always propagate the invocation to i915_schedule
` [Intel-gfx] [PATCH 3/3] drm/i915/gem: Limit struct_mutex to eb_reserve
` [Intel-gfx] ✗ Fi.CI.DOCS: warning for series starting with [1/3] drm/i915: Assert requests within a context are submitted in order
` [Intel-gfx] ✗ Fi.CI.BAT: failure "

[Intel-gfx] [PATCH v6 2/3] drm/i915: Lookup and attach ACPI device node for connectors
 2020-03-06 10:15 UTC  (12+ messages)
` [Intel-gfx] [PATCH v6 3/3] drm/i915: Add support for integrated privacy screens
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [v6,1/3] intel_acpi: Rename drm_dev local variable to dev
` [Intel-gfx] ✗ Fi.CI.DOCS: "
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✓ Fi.CI.IGT: "

[Intel-gfx] [PATCH] drm/i915: be more solid in checking the alignment
 2020-03-06 10:07 UTC  (4+ messages)
` [Intel-gfx] ✗ Fi.CI.DOCS: warning for "
` [Intel-gfx] ✓ Fi.CI.BAT: success "

[Intel-gfx] [PATCH v4 1/3] drm/i915/perf: remove generated code
 2020-03-06 10:05 UTC  (3+ messages)
` [Intel-gfx] [PATCH v4 2/3] drm/i915/perf: remove redundant power configuration register override
` [Intel-gfx] [PATCH v4 3/3] drm/i915/perf: introduce global sseu pinning

[Intel-gfx] [PATCH] drm/i915/phys: unconditionally call release_memory_region
 2020-03-06 10:05 UTC  (4+ messages)
` [Intel-gfx] ✗ Fi.CI.DOCS: warning for "
` [Intel-gfx] ✓ Fi.CI.BAT: success "

[Intel-gfx] [PATCH v6 1/3] intel_acpi: Rename drm_dev local variable to dev
 2020-03-06  9:33 UTC  (5+ messages)
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [v6,1/3] "
` [Intel-gfx] ✗ Fi.CI.DOCS: "
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✓ Fi.CI.IGT: "

[Intel-gfx] [PATCH v2] drm/i915: properly sanity check batch_start_offset
 2020-03-06  9:08 UTC  (4+ messages)
` [Intel-gfx] ✗ Fi.CI.DOCS: warning for drm/i915: properly sanity check batch_start_offset (rev2)
` [Intel-gfx] ✓ Fi.CI.BAT: success "

[Intel-gfx] [CI 1/2] drm/i915: Add mechanism to submit a context WA on ring submission
 2020-03-06  8:27 UTC  (5+ messages)
` [Intel-gfx] [CI 2/2] drm/i915/gen7: Clear all EU/L3 residual contexts
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [CI,1/2] drm/i915: Add mechanism to submit a context WA on ring submission
` [Intel-gfx] ✗ Fi.CI.DOCS: "
` [Intel-gfx] ✓ Fi.CI.BAT: success "

[Intel-gfx] [PATCH 1/2] drm/i915/buddy: avoid double list_add
 2020-03-06  6:48 UTC  (4+ messages)
` [Intel-gfx] [PATCH 2/2] drm/i915/selftests: try to rein in alloc_smoke
` [Intel-gfx] ✗ Fi.CI.DOCS: warning for series starting with [1/2] drm/i915/buddy: avoid double list_add
` [Intel-gfx] ✗ Fi.CI.BAT: failure "

[Intel-gfx] [PATCH v2] i915/gem_exec_params: add test_invalid_batch
 2020-03-06  6:37 UTC  (2+ messages)
` [Intel-gfx] ✗ Fi.CI.BUILD: failure for "

[Intel-gfx] [PATCH v5 00/16] drm/i915: Add support for HDCP 1.4 over MST connectors
 2020-03-06  3:48 UTC  (20+ messages)
` [Intel-gfx] [PATCH v5 01/16] drm/i915: Fix sha_text population code
` [Intel-gfx] [PATCH v5 02/16] drm/i915: Clear the repeater bit on HDCP disable
` [Intel-gfx] [PATCH v5 03/16] drm/i915: WARN if HDCP signalling is enabled upon disable
` [Intel-gfx] [PATCH v5 04/16] drm/i915: Intercept Aksv writes in the aux hooks
` [Intel-gfx] [PATCH v5 05/16] drm/i915: Use the cpu_transcoder in intel_hdcp to toggle HDCP signalling
` [Intel-gfx] [PATCH v5 06/16] drm/i915: Factor out hdcp->value assignments
` [Intel-gfx] [PATCH v5 07/16] drm/i915: Protect workers against disappearing connectors
` [Intel-gfx] [PATCH v5 08/16] drm/i915: Don't fully disable HDCP on a port if multiple pipes are using it
` [Intel-gfx] [PATCH v5 09/16] drm/i915: Support DP MST in enc_to_dig_port() function
` [Intel-gfx] [PATCH v5 10/16] drm/i915: Use ddi_update_pipe in intel_dp_mst
` [Intel-gfx] [PATCH v5 11/16] drm/i915: Factor out HDCP shim functions from dp for use by dp_mst
` [Intel-gfx] [PATCH v5 12/16] drm/i915: Plumb port through hdcp init
` [Intel-gfx] [PATCH v5 13/16] drm/i915: Add connector to hdcp_shim->check_link()
` [Intel-gfx] [PATCH v5 14/16] drm/mst: Add support for QUERY_STREAM_ENCRYPTION_STATUS MST sideband message
` [Intel-gfx] [PATCH v5 15/16] drm/i915: Print HDCP version info for all connectors
` [Intel-gfx] [PATCH v5 16/16] drm/i915: Add HDCP 1.4 support for MST connectors
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Add support for HDCP 1.4 over MST connectors (rev5)
` [Intel-gfx] ✗ Fi.CI.DOCS: "
` [Intel-gfx] ✓ Fi.CI.BAT: success "

[Intel-gfx] [PATCH] drm/i915/tgl: Don't treat unslice registers as masked
 2020-03-06  3:47 UTC  (4+ messages)
` [Intel-gfx] ✗ Fi.CI.BUILD: failure for "

[Intel-gfx] [PATCH] drm/i915/tgl: Make wa_1606700617 permanent
 2020-03-06  3:17 UTC  (3+ messages)
` [Intel-gfx] ✗ Fi.CI.DOCS: warning for drm/i915/tgl: Make wa_1606700617 permanent (rev2)
` [Intel-gfx] ✓ Fi.CI.BAT: success "

[Intel-gfx] [PATCH] drm/i915/hotplug: Use phy to get the hpd_pin instead of the port
 2020-03-06  3:01 UTC  (2+ messages)
` [Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/hotplug: Use phy to get the hpd_pin instead of the port (rev6)

[Intel-gfx] [PATCH] drm/i915: Fix crtc nv12 etc. plane bitmasks for DPMS off
 2020-03-06  2:48 UTC  (3+ messages)
` [Intel-gfx] ✗ Fi.CI.DOCS: warning for "
` [Intel-gfx] ✓ Fi.CI.BAT: success "

[Intel-gfx] [PATCH 1/1] Revert "drm/i915/tgl: Add extra hdc flush workaround"
 2020-03-06  2:15 UTC  (2+ messages)
` [Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [1/1] "

[Intel-gfx] [PATCH] drm/i915: properly sanity check batch_start_offset
 2020-03-06  1:27 UTC  (2+ messages)
` [Intel-gfx] ✗ Fi.CI.IGT: failure for "

[Intel-gfx] [PATCH] drm/i915/gem: Limit struct_mutex to eb_reserve
 2020-03-06  1:18 UTC  (3+ messages)
` [Intel-gfx] ✗ Fi.CI.DOCS: warning for drm/i915/gem: Limit struct_mutex to eb_reserve (rev2)
` [Intel-gfx] ✗ Fi.CI.BAT: failure "

[Intel-gfx] [PATCH 0/6] Re-org uC debugfs files and move them under GT
 2020-03-05 23:10 UTC  (6+ messages)
` [Intel-gfx] [PATCH 5/6] drm/i915/uc: Move uC debugfs to its own folder "

[Intel-gfx] [CI 1/2] drm/i915: Add mechanism to submit a context WA on ring submission
 2020-03-05 22:01 UTC  (4+ messages)
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [CI,1/2] "
` [Intel-gfx] ✗ Fi.CI.DOCS: "
` [Intel-gfx] ✗ Fi.CI.BAT: failure "

[Intel-gfx] [PATCH] drm/i915/dp: Add dpcd link_rate quirk for Apple 15" MBP 2017 (v2)
 2020-03-05 19:58 UTC  (2+ messages)
` [Intel-gfx] ✗ Fi.CI.BUILD: failure for drm/i915/dp: Add dpcd link_rate quirk for Apple 15" MBP 2017 (rev2)

[Intel-gfx] [PATCH 2/2] drm/i915/tgl: Move and restrict Wa_1408615072
 2020-03-05 19:15 UTC  (3+ messages)

[Intel-gfx] [PATCH 1/1] Revert "drm/i915/tgl: Add extra hdc flush workaround"
 2020-03-05 19:04 UTC  (2+ messages)
` [Intel-gfx] ✗ Fi.CI.IGT: failure for series starting with [1/1] "


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