messages from 2020-06-15 16:19:12 to 2020-06-17 07:58:13 UTC [more...]
[Intel-gfx] [PATCH 00/18] dma-fence lockdep annotations, round 2
2020-06-17 7:57 UTC (7+ messages)
` [Intel-gfx] [PATCH 04/18] dma-fence: prime lockdep annotations
` [Intel-gfx] [Linaro-mm-sig] "
[Intel-gfx] [PATCH] drm/i915/gvt: query if vgpu is active via GETPARAM IOCTL
2020-06-17 7:54 UTC (4+ messages)
` [Intel-gfx] ✗ Fi.CI.BUILD: failure for drm/i915/gvt: query if vgpu is active via GETPARAM IOCTL (rev2)
[Intel-gfx] linux-next: build failure after merge of the drm-misc tree
2020-06-17 7:03 UTC (6+ messages)
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for "
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✗ Fi.CI.IGT: failure "
[Intel-gfx] i915/kexec: warning at drivers/gpu/drm/i915/display/intel_psr.c:782 intel_psr_activate+0x3c6/0x440
2020-06-17 6:53 UTC
[Intel-gfx] [CI] drm/i915/selftests: Check preemption rollback of different ring queue depths
2020-06-17 5:07 UTC (3+ messages)
` [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/selftests: Check preemption rollback of different ring queue depths (rev2)
` [Intel-gfx] ✓ Fi.CI.IGT: "
[Intel-gfx] [PULL] gvt-fixes
2020-06-17 4:34 UTC
[Intel-gfx] [PATCH v7 0/5] Remaining RKL patches
2020-06-17 4:30 UTC (7+ messages)
` [Intel-gfx] [PATCH v7 1/5] drm/i915/rkl: Handle new DPCLKA_CFGCR0 layout
` [Intel-gfx] [PATCH v7 2/5] drm/i915/rkl: Add DPLL4 support
` [Intel-gfx] [PATCH v7 3/5] drm/i915/rkl: Handle HTI
` [Intel-gfx] [PATCH v7 4/5] drm/i915/rkl: Add initial workarounds
` [Intel-gfx] [PATCH v7 5/5] drm/i915/rkl: Add Wa_14011224835 for PHY B initialization
` [Intel-gfx] ✗ Fi.CI.BAT: failure for Remaining RKL patches (rev6)
[Intel-gfx] [PATCH v6 0/5] Remaining RKL patches
2020-06-17 1:16 UTC (9+ messages)
` [Intel-gfx] [PATCH v6 1/5] drm/i915/rkl: Handle new DPCLKA_CFGCR0 layout
` [Intel-gfx] [PATCH v6 2/5] drm/i915/rkl: Add DPLL4 support
` [Intel-gfx] [PATCH v6 3/5] drm/i915/rkl: Handle HTI
` [Intel-gfx] [PATCH v6 4/5] drm/i915/rkl: Add initial workarounds
` [Intel-gfx] [PATCH v6 5/5] drm/i915/rkl: Add Wa_14011224835 for PHY B initialization
` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for Remaining RKL patches (rev5)
` [Intel-gfx] ✓ Fi.CI.BAT: success "
[Intel-gfx] linux-next: manual merge of the drm-misc tree with Linus' tree
2020-06-17 0:46 UTC
[Intel-gfx] [PATCH] drm/i915: Apply Wa_14011264657:gen11+
2020-06-16 23:48 UTC (8+ messages)
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for "
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✗ Fi.CI.IGT: failure "
[Intel-gfx] [PATCH 1/6] drm/i915/tgl+: Use the correct DP_TP_* register instances in MST encoders
2020-06-16 23:36 UTC (31+ messages)
` [Intel-gfx] [PATCH 2/6] drm/i915/dp_mst: Disable link training fallback on MST links
` [Intel-gfx] [PATCH v2 "
` [Intel-gfx] [PATCH 3/6] drm/i915/dp_mst: Move clearing the ACT sent flag closer to its polling
` [Intel-gfx] [PATCH 4/6] drm/i915/dp_mst: Clear only the ACT sent flag from DP_TP_STATUS
` [Intel-gfx] [PATCH 5/6] drm/i915/dp_mst: Clear the ACT sent flag during encoder disabling too
` [Intel-gfx] [PATCH 6/6] drm/i915/dp_mst: Ensure the DPCD ACT sent flag is cleared before waiting for it
` [Intel-gfx] [PATCH v2 "
` [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/6] drm/i915/tgl+: Use the correct DP_TP_* register instances in MST encoders
` [Intel-gfx] [PATCH v2 1/6] "
` [Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [1/6] "
` [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [v2,1/6] drm/i915/tgl+: Use the correct DP_TP_* register instances in MST encoders (rev4)
[Intel-gfx] [PATCH] drm/i915/dp: Poll for DDI Idle status to be 0 after enabling DDI Buf
2020-06-16 23:11 UTC (7+ messages)
` [Intel-gfx] ✓ Fi.CI.BAT: success for "
[Intel-gfx] [PATCH][next] drm/i915/selftests: Fix inconsistent IS_ERR and PTR_ERR
2020-06-16 23:02 UTC (4+ messages)
` [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/selftests: fix inconsistent IS_ERR and PTR_ERR (rev2)
` [Intel-gfx] ✗ Fi.CI.IGT: failure "
[Intel-gfx] [PATCH] drm/i915/gt: Decouple completed requests on unwind
2020-06-16 22:45 UTC (4+ messages)
` [Intel-gfx] ✓ Fi.CI.BAT: success for "
[Intel-gfx] [CI 1/2] drm/i915/selftests: Exercise far preemption rollbacks
2020-06-16 22:20 UTC (4+ messages)
` [Intel-gfx] [CI 2/2] drm/i915/selftests: Use friendly request names for live_timeslice_rewind
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [CI,1/2] drm/i915/selftests: Exercise far preemption rollbacks
` [Intel-gfx] ✗ Fi.CI.BAT: failure "
[Intel-gfx] [PATCH] drm/i915: Mark up inline getters as taking a const i915_request
2020-06-16 21:54 UTC (3+ messages)
` [Intel-gfx] ✓ Fi.CI.BAT: success for "
[Intel-gfx] [PATCH] drm/i915/display: fix missing null check on allocated dsb object
2020-06-16 21:33 UTC (6+ messages)
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for "
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✓ Fi.CI.IGT: "
[Intel-gfx] [PATCH 1/6] drm/i915/rkl: Disable PSR2
2020-06-16 21:00 UTC (15+ messages)
` [Intel-gfx] [PATCH 4/6] drm/i915: Add PSR2 software tracking registers
` [Intel-gfx] [PATCH 5/6] drm/i915: Implement PSR2 selective fetch
[Intel-gfx] [PATCH] drm/i915/selftests: Check preemption rollback of different ring queue depths
2020-06-16 20:47 UTC (4+ messages)
` [Intel-gfx] ✓ Fi.CI.BAT: success for "
` [Intel-gfx] ✗ Fi.CI.IGT: failure "
[Intel-gfx] [PATCH] drm/shmem-helper: Only dma-buf imports are private obj
2020-06-16 19:23 UTC (4+ messages)
` [Intel-gfx] ✗ Fi.CI.BAT: failure for "
[Intel-gfx] [PATCH][next] drm/i915: fix a couple of spelling mistakes in kernel parameter help text
2020-06-16 19:08 UTC (4+ messages)
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for "
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✓ Fi.CI.IGT: "
[Intel-gfx] [PATCH] drm/i915/gvt: query if vgpu is active via GETPARAM IOCTL
2020-06-16 18:47 UTC (4+ messages)
` [Intel-gfx] ✗ Fi.CI.BUILD: failure for "
[Intel-gfx] [PATCH 1/9] drm/i915/selftests: Exercise far preemption rollbacks
2020-06-16 18:37 UTC (18+ messages)
` [Intel-gfx] [PATCH 2/9] drm/i915/selftests: Use friendly request names for live_timeslice_rewind
` [Intel-gfx] [PATCH 3/9] drm/i915/selftests: Enable selftesting of busy-stats
` [Intel-gfx] [PATCH 4/9] drm/i915/execlists: Replace direct submit with direct call to tasklet
` [Intel-gfx] [PATCH 5/9] drm/i915/execlists: Defer schedule_out until after the next dequeue
` [Intel-gfx] [PATCH 6/9] drm/i915/gt: ce->inflight updates are now serialised
` [Intel-gfx] [PATCH 7/9] drm/i915/gt: Drop atomic for engine->fw_active tracking
` [Intel-gfx] [PATCH 8/9] drm/i915/gt: Extract busy-stats for ring-scheduler
` [Intel-gfx] [PATCH 9/9] drm/i915/gt: Convert stats.active to plain unsigned int
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/9] drm/i915/selftests: Exercise far preemption rollbacks
` [Intel-gfx] ✗ Fi.CI.BAT: failure "
[Intel-gfx] [PATCH 1/8] drm/atomic-helper: reset vblank on crtc reset
2020-06-16 17:16 UTC (6+ messages)
` [Intel-gfx] [PATCH 7/8] drm/mipi-dbi: Remove ->enabled
[Intel-gfx] [PATCH] drm/shmem-helper: Fix obj->filp derefence
2020-06-16 17:10 UTC (5+ messages)
` [Intel-gfx] ✓ Fi.CI.IGT: success for "
[Intel-gfx] [PATCH v6 3/3] drm/i915/dp: Expose connector VRR monitor range via debugfs
2020-06-16 15:34 UTC (6+ messages)
` [Intel-gfx] [PATCH v7 "
[Intel-gfx] [PATCH] drm/i915/selftests: Exercise far preemption rollbacks
2020-06-16 14:23 UTC (8+ messages)
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for "
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/selftests: Exercise far preemption rollbacks (rev2)
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✓ Fi.CI.IGT: "
[Intel-gfx] [PATCH libdrm] intel: sync i915_pciids.h with kernel
2020-06-16 12:37 UTC
[Intel-gfx] [PATCH 01/28] drm/i915: Adjust the sentinel assert to match implementation
2020-06-16 12:44 UTC (7+ messages)
` [Intel-gfx] [PATCH 26/28] drm/i915: Fair low-latency scheduling
[Intel-gfx] [PATCH 00/59] devm_drm_dev_alloc, v2
2020-06-16 11:55 UTC (4+ messages)
` [Intel-gfx] [PATCH 57/59] drm/ast: Use managed pci functions
[Intel-gfx] [CI] Pre-merge testing disabled
2020-06-16 9:37 UTC
[Intel-gfx] linux-next: build failure after merge of the drm-intel-fixes tree
2020-06-16 9:22 UTC (2+ messages)
[Intel-gfx] [drm-intel:for-linux-next-fixes 4/16] drivers/gpu/drm/i915/gt/selftest_lrc.c:1402:3: error: too few arguments to function 'engine_heartbeat_enable'
2020-06-16 4:18 UTC
[Intel-gfx] [PATCH] drm/i915/gt: Don't flush the tasklet if not setup
2020-06-15 22:56 UTC (4+ messages)
` [Intel-gfx] ✓ Fi.CI.BAT: success for "
` [Intel-gfx] ✗ Fi.CI.IGT: failure "
[Intel-gfx] [drm-intel:for-linux-next-fixes 4/16] drivers/gpu/drm/i915/gt/selftest_lrc.c:1333:34: error: too few arguments to function call, expected 2, have 1
2020-06-15 22:27 UTC
[Intel-gfx] [v3 0/8] Enable HDR on MCA LSPCON based Gen9 devices
2020-06-15 21:03 UTC (7+ messages)
` [Intel-gfx] [v3 6/8] drm/i915/display: Implement infoframes readback for LSPCON
[Intel-gfx] [CI 1/3] drm/i915/selftests: Disable preemptive heartbeats over preemption tests
2020-06-15 19:42 UTC (7+ messages)
` [Intel-gfx] [CI 2/3] drm/i915/selftests: Dump engine state and trace upon hanging after reset
` [Intel-gfx] [CI 3/3] drm/i915/gt: Add a safety submission flush in the heartbeat
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [CI,1/3] drm/i915/selftests: Disable preemptive heartbeats over preemption tests
` [Intel-gfx] ✗ Fi.CI.SPARSE: "
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✗ Fi.CI.IGT: failure "
[Intel-gfx] [PATCH] drm/i915: Remove redundant i915_request_await_object in blit clears
2020-06-15 18:57 UTC (8+ messages)
` [Intel-gfx] [PATCH v2] "
` [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Remove redundant i915_request_await_object in blit clears (rev2)
` [Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Remove redundant i915_request_await_object in blit clears
` [Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Remove redundant i915_request_await_object in blit clears (rev2)
[Intel-gfx] [PATCH] drm/i915: Include asm sources for {ivb, hsw}_clear_kernel.c
2020-06-15 18:54 UTC (4+ messages)
[Intel-gfx] [PATCH 1/3] drm/mm: remove unused rb_hole_size()
2020-06-15 17:30 UTC (7+ messages)
` [Intel-gfx] [PATCH 2/3] drm/mm: optimize find_hole() as well
` [Intel-gfx] [PATCH 3/3] drm/mm: cleanup and improve next_hole_*_addr()
` [Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [1/3] drm/mm: remove unused rb_hole_size()
[Intel-gfx] [PATCH] drm/i915/dp: DP PHY compliance for JSL
2020-06-15 16:19 UTC (11+ messages)
[Intel-gfx] [PATCH 03/10] drm/i915/gt: Add a safety submission flush in the heartbeat
2020-06-15 16:16 UTC (3+ messages)
` [Intel-gfx] [PATCH] "
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