messages from 2020-06-18 00:43:04 to 2020-06-20 12:19:23 UTC [more...]
[Intel-gfx] [PATCH v3 00/15] acpi/pwm/i915: Convert pwm-crc and i915 driver's PWM code to use the atomic PWM API
2020-06-20 12:17 UTC (14+ messages)
` [Intel-gfx] [PATCH v3 01/15] ACPI / LPSS: Resume Cherry Trail PWM controller in no-irq phase
` [Intel-gfx] [PATCH v3 02/15] ACPI / LPSS: Save Cherry Trail PWM ctx registers only once (at activation)
` [Intel-gfx] [PATCH v3 03/15] pwm: lpss: Fix off by one error in base_unit math in pwm_lpss_prepare()
` [Intel-gfx] [PATCH v3 04/15] pwm: lpss: Add range limit check for the base_unit register value
` [Intel-gfx] [PATCH v3 05/15] pwm: lpss: Use pwm_lpss_apply() when restoring state on resume
` [Intel-gfx] [PATCH v3 06/15] pwm: crc: Fix period / duty_cycle times being off by a factor of 256
` [Intel-gfx] [PATCH v3 07/15] pwm: crc: Fix off-by-one error in the clock-divider calculations
` [Intel-gfx] [PATCH v3 08/15] pwm: crc: Fix period changes not having any effect
` [Intel-gfx] [PATCH v3 09/15] pwm: crc: Enable/disable PWM output on enable/disable
` [Intel-gfx] [PATCH v3 10/15] pwm: crc: Implement apply() method to support the new atomic PWM API
` [Intel-gfx] [PATCH v3 11/15] pwm: crc: Implement get_state() method
` [Intel-gfx] [PATCH v3 12/15] drm/i915: panel: Add get_vbt_pwm_freq() helper
` [Intel-gfx] [PATCH v3 13/15] drm/i915: panel: Honor the VBT PWM frequency for devs with an external PWM controller
[Intel-gfx] [CI 1/2] drm/i915/gvt: Drop redundant prepare_write/pin_pages
2020-06-20 0:35 UTC (4+ messages)
` [Intel-gfx] [CI 2/2] drm/i915/gt: Replace manual kmap_atomic() with pin_map for renderstate
` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for series starting with [CI,1/2] drm/i915/gvt: Drop redundant prepare_write/pin_pages
` [Intel-gfx] ✓ Fi.CI.BAT: success "
[Intel-gfx] [drm-intel:topic/core-for-CI 17/21] drivers/staging/media/soc_camera/soc_mediabus.c:19:4: error: 'struct soc_mbus_pixelfmt' has no member named 'name'
2020-06-20 0:07 UTC
[Intel-gfx] [drm-intel:topic/core-for-CI 17/21] include/net/ax25.h:121:24: error: redeclaration of enumerator 'AX25_PROTO_DAMA_MASTER'
2020-06-19 23:56 UTC
[Intel-gfx] [CI] drm/i915/gem: Avoid kmalloc under i915->mm_lock
2020-06-19 23:42 UTC (4+ messages)
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for "
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✓ Fi.CI.IGT: "
[Intel-gfx] [PATCH] drm/i915/gt: Show the culmative runtime as part of the engine info
2020-06-19 22:18 UTC (4+ messages)
` [Intel-gfx] ✓ Fi.CI.BAT: success for "
` [Intel-gfx] ✓ Fi.CI.IGT: "
[Intel-gfx] [PATCH 00/18] dma-fence lockdep annotations, round 2
2020-06-19 20:59 UTC (33+ messages)
` [Intel-gfx] [PATCH 03/18] dma-fence: basic lockdep annotations
` [Intel-gfx] [PATCH 04/18] dma-fence: prime "
` [Intel-gfx] [Linaro-mm-sig] "
[Intel-gfx] [PATCH] drm/i915/tgl: Make Wa_14010229206 permanent
2020-06-19 20:14 UTC (4+ messages)
` [Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915/tgl: Make Wa_14010229206 permanent (rev2)
[Intel-gfx] [v6 0/3] VRR capable attach prop in i915, DPCD helper, VRR debugfs
2020-06-19 21:23 UTC (9+ messages)
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for VRR capable attach prop in i915, DPCD helper, VRR debugfs (rev3)
` [Intel-gfx] ✗ Fi.CI.SPARSE: "
` [Intel-gfx] ✗ Fi.CI.BAT: failure "
` [Intel-gfx] [v6 1/3] drm/dp: DRM DP helper for reading Ignore MSA from DPCD
` [Intel-gfx] [v6 2/3] drm/i915/dp: Attach and set drm connector VRR property
` [Intel-gfx] [v8 3/3] drm/debug: Expose connector VRR monitor range via debugfs
[Intel-gfx] [PATCH 1/3] drm/i915/gem: Avoid kmalloc under i915->mm_lock
2020-06-19 19:44 UTC (9+ messages)
` [Intel-gfx] [PATCH 2/3] drm/i915/gvt: Drop redundant prepare_write/pin_pages
` [Intel-gfx] [PATCH 3/3] drm/i915/gt: Replace manual kmap_atomic() with pin_map for renderstate
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/3] drm/i915/gem: Avoid kmalloc under i915->mm_lock
` [Intel-gfx] ✗ Fi.CI.SPARSE: "
[Intel-gfx] [PATCH] drm/i915/gt: Initialise rps timestamp
2020-06-19 18:34 UTC (4+ messages)
` [Intel-gfx] ✓ Fi.CI.BAT: success for "
` [Intel-gfx] ✗ Fi.CI.IGT: failure "
[Intel-gfx] [PULL] drm-misc-next
2020-06-19 15:19 UTC
[Intel-gfx] [PATCH v6 0/3] VRR capable attach prop in i915, DPCD helper, VRR debugfs
2020-06-19 21:11 UTC (7+ messages)
` [Intel-gfx] [PATCH v6 1/3] drm/dp: DRM DP helper for reading Ignore MSA from DPCD
` [Intel-gfx] [v6 0/3] VRR capable attach prop in i915, DPCD helper, VRR debugfs
` [Intel-gfx] [v6 1/3] drm/dp: DRM DP helper for reading Ignore MSA from DPCD
` [Intel-gfx] [v6 2/3] drm/i915/dp: Attach and set drm connector VRR property
` [Intel-gfx] [v8 3/3] drm/debug: Expose connector VRR monitor range via debugfs
[Intel-gfx] [PATCH v7 09/36] drm: i915: fix common struct sg_table related issues
2020-06-19 10:36 UTC
[Intel-gfx] [PATCH] drm/i915/params: switch to device specific parameters
2020-06-18 23:28 UTC (5+ messages)
` [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/params: switch to device specific parameters (rev2)
` [Intel-gfx] ✗ Fi.CI.IGT: failure "
` [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/params: switch to device specific parameters (rev3)
` [Intel-gfx] ✗ Fi.CI.IGT: failure "
[Intel-gfx] next-20200618: oops in eb_relocate_vma in Xorg process, making machine unusable
2020-06-18 21:29 UTC
[Intel-gfx] [PATCH v6 3/3] drm/i915/dp: Expose connector VRR monitor range via debugfs
2020-06-18 18:35 UTC (6+ messages)
` [Intel-gfx] [PATCH v7 "
[Intel-gfx] [PATCH v6 00/16] drm/i915: Add support for HDCP 1.4 over MST connectors
2020-06-18 18:20 UTC (4+ messages)
` [Intel-gfx] [PATCH v6 16/16] drm/i915: Add HDCP 1.4 support for "
[Intel-gfx] [PATCH v6 09/36] drm: i915: fix common struct sg_table related issues
2020-06-18 15:39 UTC
[Intel-gfx] [PATCH] drm/i915: Apply Wa_14011264657:gen11+
2020-06-18 15:37 UTC (3+ messages)
[Intel-gfx] [PATCH 01/11] drm/i915/gt: Decouple completed requests on unwind
2020-06-18 15:31 UTC (29+ messages)
` [Intel-gfx] [PATCH 02/11] drm/i915/gt: Check for a completed last request once
` [Intel-gfx] [PATCH 03/11] drm/i915/gt: Replace direct submit with direct call to tasklet
` [Intel-gfx] [PATCH] "
` [Intel-gfx] [PATCH 04/11] drm/i915/execlists: Defer schedule_out until after the next dequeue
` [Intel-gfx] [PATCH 05/11] drm/i915/gt: ce->inflight updates are now serialised
` [Intel-gfx] [PATCH 06/11] drm/i915/gt: Drop atomic for engine->fw_active tracking
` [Intel-gfx] [PATCH 07/11] drm/i915/gt: Extract busy-stats for ring-scheduler
` [Intel-gfx] [PATCH 08/11] drm/i915/gt: Convert stats.active to plain unsigned int
` [Intel-gfx] [PATCH 09/11] drm/i915/gt: Use virtual_engine during execlists_dequeue
` [Intel-gfx] [PATCH 10/11] drm/i915/gt: Decouple inflight virtual engines
` [Intel-gfx] [PATCH 11/11] drm/i915/gt: Resubmit the virtual engine on schedule-out
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [01/11] drm/i915/gt: Decouple completed requests on unwind
` [Intel-gfx] ✗ Fi.CI.SPARSE: "
` [Intel-gfx] ✗ Fi.CI.BAT: failure "
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [01/11] drm/i915/gt: Decouple completed requests on unwind (rev3)
` [Intel-gfx] ✗ Fi.CI.SPARSE: "
` [Intel-gfx] ✗ Fi.CI.BAT: failure "
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [01/11] drm/i915/gt: Decouple completed requests on unwind (rev6)
` [Intel-gfx] ✗ Fi.CI.SPARSE: "
` [Intel-gfx] ✗ Fi.CI.BAT: failure "
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [01/11] drm/i915/gt: Decouple completed requests on unwind (rev7)
` [Intel-gfx] ✗ Fi.CI.SPARSE: "
` [Intel-gfx] ✗ Fi.CI.BAT: failure "
[Intel-gfx] [PATCH][next] drm/i915/query: Use struct_size() helper
2020-06-18 15:25 UTC (3+ messages)
` [Intel-gfx] ✓ Fi.CI.BAT: success for "
` [Intel-gfx] ✓ Fi.CI.IGT: "
[Intel-gfx] [PULL] gvt-fixes
2020-06-18 12:48 UTC (2+ messages)
[Intel-gfx] [PULL] drm-intel-fixes
2020-06-18 12:46 UTC
[Intel-gfx] [PATCH i-g-t 01/11] gem_wsim: Rip out userspace balancing
2020-06-18 11:15 UTC (19+ messages)
` [Intel-gfx] [PATCH i-g-t 02/11] gem_wsim: Buffer objects working sets and complex dependencies
` [Intel-gfx] [igt-dev] "
` [Intel-gfx] [PATCH i-g-t 03/11] gem_wsim: Show workload timing stats
` [Intel-gfx] [igt-dev] "
` [Intel-gfx] [PATCH i-g-t 04/11] gem_wsim: Move BO allocation to a helper
` [Intel-gfx] [igt-dev] "
` [Intel-gfx] [PATCH i-g-t 05/11] gem_wsim: Support random buffer sizes
` [Intel-gfx] [igt-dev] "
` [Intel-gfx] [PATCH i-g-t 06/11] gem_wsim: Support scaling workload batch durations
` [Intel-gfx] [igt-dev] "
` [Intel-gfx] [PATCH i-g-t 07/11] gem_wsim: Log max and active working set sizes in verbose mode
` [Intel-gfx] [PATCH i-g-t 08/11] gem_wsim: Snippet of a workload extracted from carchase
` [Intel-gfx] [PATCH i-g-t 09/11] gem_wsim: Implement device selection
` [Intel-gfx] [PATCH i-g-t 10/11] gem_wsim: Fix calibration handling
` [Intel-gfx] [igt-dev] "
` [Intel-gfx] [PATCH i-g-t 11/11] gem_wsim: Do not keep batch mapped unless needed
` [Intel-gfx] [igt-dev] [PATCH i-g-t 01/11] gem_wsim: Rip out userspace balancing
[Intel-gfx] [PATCH i-g-t] tests: Move perf/perf_pmu under i915
2020-06-18 10:50 UTC
[Intel-gfx] [PATCH i-g-t 00/10] gem_wsim improvements
2020-06-18 10:05 UTC (26+ messages)
` [Intel-gfx] [PATCH i-g-t 01/10] gem_wsim: Rip out userspace balancing
` [Intel-gfx] [PATCH i-g-t 02/10] gem_wsim: Buffer objects working sets and complex dependencies
` [Intel-gfx] [PATCH i-g-t 03/10] gem_wsim: Show workload timing stats
` [Intel-gfx] [PATCH i-g-t 05/10] gem_wsim: Support random buffer sizes
` [Intel-gfx] [PATCH i-g-t 06/10] gem_wsim: Support scaling workload batch durations
` [Intel-gfx] [PATCH i-g-t 08/10] gem_wsim: Snippet of a workload extracted from carchase
[Intel-gfx] i915/kexec: warning at drivers/gpu/drm/i915/display/intel_psr.c:782 intel_psr_activate+0x3c6/0x440
2020-06-18 9:54 UTC (3+ messages)
[Intel-gfx] [PATCH i-g-t] tests: Move perf/perf_pmu under i915
2020-06-18 9:52 UTC (2+ messages)
[Intel-gfx] [CI] drm/i915/selftests: Check preemption rollback of different ring queue depths
2020-06-18 8:53 UTC (2+ messages)
[Intel-gfx] [PATCH 1/2] drm/i915/selftests: Enable selftesting of busy-stats
2020-06-18 8:13 UTC (3+ messages)
` [Intel-gfx] [PATCH 2/2] drm/i915/gt: Always report the sample time for busy-stats
[Intel-gfx] [PATCH v7 0/5] Remaining RKL patches
2020-06-18 6:38 UTC (6+ messages)
` [Intel-gfx] [PATCH v7 2/5] drm/i915/rkl: Add DPLL4 support
[Intel-gfx] [PATCH v2 1/2] drm/i915/dp: Helper for checking DDI_BUF_CTL Idle status
2020-06-18 1:55 UTC (3+ messages)
` [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [v2,1/2] "
` [Intel-gfx] ✓ Fi.CI.IGT: "
[Intel-gfx] [PATCH v2 00/32] Introduce DG1
2020-06-18 1:18 UTC (32+ messages)
` [Intel-gfx] [PATCH v2 01/32] drm/i915/rkl: Handle new DPCLKA_CFGCR0 layout
` [Intel-gfx] [PATCH v2 02/32] drm/i915/rkl: Add DPLL4 support
` [Intel-gfx] [PATCH v2 04/32] drm/i915/rkl: Add initial workarounds
` [Intel-gfx] [PATCH v2 05/32] drm/i915/rkl: Add Wa_14011224835 for PHY B initialization
` [Intel-gfx] [PATCH v2 06/32] drm/i915: Add has_master_unit_irq flag
` [Intel-gfx] [PATCH v2 08/32] drm/i915/dg1: Add DG1 PCI IDs
` [Intel-gfx] [PATCH v2 09/32] drm/i915/dg1: add support for the master unit interrupt
` [Intel-gfx] [PATCH v2 10/32] drm/i915/dg1: Remove SHPD_FILTER_CNT register programming
` [Intel-gfx] [PATCH v2 12/32] drm/i915/dg1: Initialize RAWCLK properly
` [Intel-gfx] [PATCH v2 13/32] drm/i915/dg1: Define MOCS table for DG1
` [Intel-gfx] [PATCH v2 14/32] drm/i915/dg1: Add DG1 power wells
` [Intel-gfx] [PATCH v2 15/32] drm/i915/dg1: Increase mmio size to 4MB
` [Intel-gfx] [PATCH v2 17/32] drm/i915/dg1: Add DPLL macros for DG1
` [Intel-gfx] [PATCH v2 18/32] drm/i915/dg1: Add and setup DPLLs "
` [Intel-gfx] [PATCH v2 19/32] drm/i915/dg1: Enable DPLL "
` [Intel-gfx] [PATCH v2 20/32] drm/i915/dg1: add hpd interrupt handling
` [Intel-gfx] [PATCH v2 21/32] drm/i915/dg1: invert HPD pins
` [Intel-gfx] [PATCH v2 22/32] drm/i915/dg1: gmbus pin mapping
` [Intel-gfx] [PATCH v2 23/32] drm/i915/dg1: Enable first 2 ports for DG1
` [Intel-gfx] [PATCH v2 24/32] drm/i915/dg1: Don't program PHY_MISC for PHY-C and PHY-D
` [Intel-gfx] [PATCH v2 25/32] drm/i915/dg1: Update comp master/slave relationships for PHYs
` [Intel-gfx] [PATCH v2 26/32] drm/i915/dg1: Update voltage swing tables for DP
` [Intel-gfx] [PATCH v2 27/32] drm/i915/dg1: provide port/phy mapping for vbt
` [Intel-gfx] [PATCH v2 28/32] drm/i915/dg1: map/unmap pll clocks
` [Intel-gfx] [PATCH v2 29/32] drm/i915/dg1: enable PORT C/D aka D/E
` [Intel-gfx] [PATCH v2 30/32] drm/i915/dg1: Load DMC
` [Intel-gfx] [PATCH v2 31/32] drm/i915/dg1: Add initial DG1 workarounds
` [Intel-gfx] [PATCH v2 32/32] drm/i915/dg1: DG1 does not support DC6
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Introduce DG1 (rev2)
` [Intel-gfx] ✗ Fi.CI.SPARSE: "
` [Intel-gfx] ✗ Fi.CI.BAT: failure "
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